公开(公告)号：US20240038829A1

公开(公告)日：2024-02-01

申请号：US18295433

申请日：2023-04-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiye BAEK ,  Yi Rang Lim

IPC: H01L21/3213 ,  H01L21/285

CPC classification number: H01L28/60 ,  H01L21/32135 ,  H01L21/28556

Abstract: A method for fabricating a semiconductor device includes sequentially stacking a sacrificial layer and a support layer on a substrate, forming bottom electrodes penetrating the sacrificial layer and the support layer to come into contact with the substrate, patterning the support layer to form a support pattern that connects the bottom electrodes to each other, removing the sacrificial layer to expose surfaces of the bottom electrodes, depositing a conductive layer on the exposed surfaces of the bottom electrodes and a surface of the support pattern, and etching the conductive layer. The etching the conductive layer includes selectively removing the conductive layer on the support pattern to expose the surface of the support pattern. The depositing the conductive layer and the etching the conductive layer are alternately performed in a same chamber.