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公开(公告)号:US20210027151A1
公开(公告)日:2021-01-28
申请号:US16935500
申请日:2020-07-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Pramod Parameshwara UDUPA , Kiran Kolar CHANDRASEKHARAN , Sehwan LEE
Abstract: A processor-implemented method for generating Output Feature Map (OFM) channels using a Convolutional Neural Network (CNN), include a plurality of kernels, includes generating at least one encoded Similar or Identical Inter-Kernel Weight (S/I-IKW) stream, converting, similar and identical weights in the at least one non-pivot kernel to zero to introduce sparsity into the at least one non-pivot kernel, broadcasting at least one value to the at least one non-pivot kernel, and generating at least one OFM channel by accumulating an at least one previous OFM value with any one or any combination of any two or more of a convolution of non-zero weights of the pivot kernel and pixels of the Input Feature Map (IFM), the at least one broadcasted value, and a convolution of non-zero weights of the at least one non-pivot kernel and pixels of the IFM.
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公开(公告)号:US20230325462A1
公开(公告)日:2023-10-12
申请号:US18296165
申请日:2023-04-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Gopinath Vasanth MAHALE , Pramod Parameshwara UDUPA , Jun-Woo JANG , Kiran Kolar CHANDRASEKHARAN , Sehwan LEE
IPC: G06F17/14 , G06N3/0464 , G06F7/544
CPC classification number: G06F17/14 , G06N3/0464 , G06F7/5443
Abstract: A processor-implemented apparatus includes a forward transform module configured to transform input feature maps (IFMs) by performing a forward transform operation in a Winograd convolution (WinConv) domain, multiply and accumulate array (MAA) units configured to multiply the transformed IFMs by transformed kernels and perform a first inverse transform operation based on results of the multiplying, and an inverse transform module configured to generate output feature maps (OFMs) based on a result of the first inverse transform operation.
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公开(公告)号:US20210357734A1
公开(公告)日:2021-11-18
申请号:US17239892
申请日:2021-04-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gopinath Vasanth MAHALE , Pramod Parameshwara UDUPA , Kiran Kolar CHANDRASEK HARAN , Sehwan LEE
IPC: G06N3/063
Abstract: A z-first reference neural processing unit (NPU) for mapping Winograd Convolution is disclosed where the NPU includes memory banks configured to store input feature maps (IFMs) in a z-first data storage layout, each of the memory banks being configured to store the IFMs in one of a direct convolution (DConv) mode or a Winograd convolution (WgConv) mode, a reconfigurable IFM distributor configured to receive the IFMs from the memory banks, a parallel reconfigurable Winograd forward transform module configured to receive the IFMs from the reconfigurable IFM distributor and to transform the IFMs in a Winograd domain to transformed IFMs in the WgConv mode, multiply and accumulate (MAC) units configured to perform dot product operations on one of IFMs in the DConv mode and the transformed IFMs in the WgConv mode to obtain intermediate output feature maps (OFMs), and a reconfigurable OFM adder and Winograd inverse transform module configured to generate one of an OFM from the intermediate OFMs in the DConv mode and OFMs from the intermediate OFMs in the WgConv.
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