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公开(公告)号：US20170161944A1
公开(公告)日：2017-06-08
申请号：US15366673
申请日：2016-12-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ankur DESHWAL , Vikash KUMAR , Keshavan VARADARAJAN , Parikshit KOLIPAKA , Soma KOHLI
CPC classification number: G06T17/005 , G06T2210/12 , G06T2210/61
Abstract: A method and apparatus to construct a bounding volume hierarchy (BVH) tree includes: generating 2-dimensional (2D) tiles including primitives; converting the 2D tiles into 3-dimensional (3D) tiles; and constructing the BVH tree based on the 3D tiles.
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公开(公告)号：US20220036634A1
公开(公告)日：2022-02-03
申请号：US17503259
申请日：2021-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Keshavan VARADARAJAN , Veynu NARASIMAN , David C. TANNENBAUM
IPC: G06T15/00
Abstract: A method of packing coverage in a graphics processing unit (GPU) may include receiving an indication for a portion of an image, determining, based on the indication, a packing technique for the portion of the image, and packing coverage for the portion of the image based on the packing technique. The indication may include one or more of: an importance, a quality, a level of interest, a level of detail, or a variable-rate shading (VRS) level. The indication may be received from an application. The packing technique may include array merging. The array merging may include quad merging. The packing technique may include pixel piling. The packing technique may be a first packing technique, and the method may further include determining, based on the indication, a second packing technique for the portion of the image, and packing coverage for the portion of the image based on the second packing technique.
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公开(公告)号：US20220301095A1
公开(公告)日：2022-09-22
申请号：US17357964
申请日：2021-06-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Gabriel T. DAGANI , Christopher P. FRASCATI , FNU GURUPAD , David TANNENBAUM , Rama S.B. HARIHARA , Keshavan VARADARAJAN
Abstract: A system and a method are disclosed improving forward progress of preempted workloads. A graphics pipeline processes tiles of a first low-priority job. A controller stops the first job by resetting the GPU and preempting the first job with a second job having a higher priority, determine whether the first job has been previously preempted one or more times, and adjust a batch-binning parameter reducing a likelihood that the first job will again be preempted in the current frame. In one embodiment, the controller is configured to stop the first job at a preemption boundary during a draw call or by resetting the GPU. A batch-binning parameter may include postponing sorting primitives into tiles during a binning process, increasing a number of tiles for backend rendering, reducing a quality of anti-aliasing, decreasing a shading rate quality, and/or decreasing input resolution and increasing upscaling of the first job.
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公开(公告)号：US20220036631A1
公开(公告)日：2022-02-03
申请号：US17168168
申请日：2021-02-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Keshavan VARADARAJAN , David C. TANNENBAUM , FNU GURUPAD
Abstract: A GPU includes shader cores and a shader warp packer unit. The shader warp packer unit may receive a first primitive associated with a first partially covered quad, and a second primitive associated with a second partially covered quad. The shader warp packer unit may determine that the first partially covered quad and the second partially covered quad have non-overlapping coverage. The shader warp packer unit may pack the first partially covered quad and the second partially covered quad into a packed quad. The shader warp packer unit may send the packed quad to the shader cores. The first partially covered quad and the second partially covered quad may be spatially disjoint from each other. The shader cores may receive and process the packed quad with no loss of information relative to the shader cores individually processing the first partially covered quad and the second partially covered quad.
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公开(公告)号：US20210358072A1
公开(公告)日：2021-11-18
申请号：US16931435
申请日：2020-07-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Veynu NARASIMAN , David TANNENBAUM , Keshavan VARADARAJAN
Abstract: A method of executing an early-Z draw call in a graphics processing pipeline may include detecting a late-Z draw call in the pipeline, determining a compatibility of a depth comparison function of the early-Z draw call with a depth comparison function of the late-Z draw call, and speculatively executing a fragment of the early-Z draw call with a shader. The method may further include determining that the fragment of the early-Z draw call passes the depth comparison function of the early-Z draw call, and updating a depth buffer with a depth value for the fragment of the early-Z draw call. The method may further include determining that the fragment of the early-Z draw call provides a correct result, and forwarding the speculative shader result for the fragment to a next stage of the pipeline.
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Patent Agency Ranking
公开(公告)号：US20170161942A1
公开(公告)日：2017-06-08
申请号：US15367507
申请日：2016-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ankur DESHWAL , Somya SINGHAL , Keshavan VARADARAJAN , Soma KOHLI
CPC classification number: G06T15/005 , G06T1/20 , G06T11/40
Abstract: Provide are a methods and devices for processing graphics data in a graphics processing unit (GPU). The method of processing graphics data includes receiving, at a processor, a difference of Gaussian (DOG) layer of an image, detecting, from the received DOG layer, a candidate DOG layer of the image as an intermediate layer, detecting at least one extreme point by comparing values of the candidate DOG layer with values of a previous DOG layer and a next DOG layer, and storing the at least one extreme point in a buffer.
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公开(公告)号：US20250022090A1
公开(公告)日：2025-01-16
申请号：US18751186
申请日：2024-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Gabriel T. DAGANI , Christopher P. FRASCATI , FNU GURUPAD , David TANNENBAUM , Rama S.B. HARIHARA , Keshavan VARADARAJAN
Abstract: A system and a method are disclosed improving forward progress of preempted workloads. A graphics pipeline processes tiles of a first low-priority job. A controller stops the first job by resetting the GPU and preempting the first job with a second job having a higher priority, determine whether the first job has been previously preempted one or more times, and adjust a batch-binning parameter reducing a likelihood that the first job will again be preempted in the current frame. In one embodiment, the controller is configured to stop the first job at a preemption boundary during a draw call or by resetting the GPU. A batch-binning parameter may include postponing sorting primitives into tiles during a binning process, increasing a number of tiles for backend rendering, reducing a quality of anti-aliasing, decreasing a shading rate quality, and/or decreasing input resolution and increasing upscaling of the first job.
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公开(公告)号：US20220148122A1
公开(公告)日：2022-05-12
申请号：US17110284
申请日：2020-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： David C. TANNENBAUM , Keshavan VARADARAJAN , Veynu NARASIMAN
Abstract: A binning subsystem of a GPU includes a storage subsystem, a shader core to output first data via a first path, a selector to receive the first data via the first path, and to receive second data from the storage subsystem via a second path. The storage subsystem includes a binner unit and a control logic unit. The control logic unit causes the selector to transfer the first data or the second data to the binner unit. The binner unit may transfer binner output data to the shader core via a third path. The binner unit may transfer the binner output data to one or more subsequent stages of a graphics pipeline via a fourth path. The binner unit may transfer the binner output data to the storage subsystem via a fifth path. The control logic unit may control the binner unit such that the binner unit can be used for general purpose computation.
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公开(公告)号：US20220036632A1
公开(公告)日：2022-02-03
申请号：US17187729
申请日：2021-02-26
Applicant: Samsung Electronics Co., Ltd.
Inventor： Raun M. KRISCH , David C. TANNENBAUM , Moumine BALLO , Keshavan VARADARAJAN
Abstract: A GPU includes one or more post-processing controllers, and a 3D graphics pipeline including a post-processing shader stage following a pixel shader stage. The one or more post-processing controllers may synchronize an execution of one or more post-processing stages including the post-processing shader stage. The 3D pipeline may include one or more pixel shaders, one or more tile buffers, and a direct communication link between the post-processing shader stage and the one or more tile buffers. The one or more post-processing controllers may synchronize communication between the one or more post-processing shaders and the one or more tile buffers.
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公开(公告)号：US20210327118A1
公开(公告)日：2021-10-21
申请号：US16930310
申请日：2020-07-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Keshavan VARADARAJAN , David TANNENBAUM , Srinidhi PADMANABHAN
Abstract: A system and a method are disclosed for ray tracing in a pipeline of a graphic processing unit (GPU). It is determined whether a ray bounce of a first ray intersects a first primitive that is the closest primitive intersected by the ray bounce. The first ray is part of a first group of rays being processed by a first single-instruction-multiple-data (SIMD) process. The first ray is assigned by a sorting or binning unit to a second group of rays based on the intersection of the first primitive. The second group of rays is processed by a second SIMD process. The first ray is assigned to the second group of rays based on a material identification of the first primitive, an identification of the first primitive intersected by the ray bound of the first ray, a pixel location, and a bounce number of the ray bounce intersecting the first primitive.
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