INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20240015948A1

    公开(公告)日:2024-01-11

    申请号:US18333084

    申请日:2023-06-12

    CPC classification number: H10B12/315 H10B12/0335 H10B12/34

    Abstract: A method of manufacturing an integrated circuit device may include forming a plurality of lower electrodes above a substrate, forming a supporter configured to support the plurality of lower electrodes, forming a dielectric film on the plurality of lower electrodes and the supporter, and forming an upper electrode on the dielectric film. The dielectric film may include a lower leakage current prevention layer on an outer surface of each of the plurality of lower electrodes and an outer surface of the supporter, a first capacitor material layer on the lower leakage current prevention layer, an upper material layer on the first capacitor material layer, and a second capacitor material layer on the upper material layer.

    INTEGRATED CIRCUIT DEVICE
    3.
    发明申请

    公开(公告)号:US20250081483A1

    公开(公告)日:2025-03-06

    申请号:US18636601

    申请日:2024-04-16

    Abstract: An integrated circuit device includes a lower electrode, a dielectric film covering the lower electrode, an upper electrode covering the dielectric film, and a multilayered interface structure between the dielectric film and the upper electrode, wherein the multilayered interface structure includes a transition metal-aluminum (Al) complex oxide layer including a transition metal oxide layer in which Al atoms are dispersed, the transition metal-Al complex oxide layer being in contact with the dielectric film, and an upper interface layer including a metal oxide or a metal oxynitride, the upper interface layer being in contact with the transition metal-Al complex oxide layer.

    INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20250081431A1

    公开(公告)日:2025-03-06

    申请号:US18809483

    申请日:2024-08-20

    Abstract: An integrated circuit device comprising; a transistor on a substrate, and a capacitor structure electrically connected to the transistor. The capacitor structure includes a lower electrode, a lower interface film on the lower electrode, a capacitor dielectric film on the lower interface film, an upper interface film on the capacitor dielectric film, and an upper electrode on the upper interface film. The lower interface film includes a first lower interface layer including metal oxide doped with an impurity, a second lower interface layer including a material that is substantially the same as a material of the first lower interface layer and doped with nitrogen, and a third lower interface layer including a material that is identical to a material of the capacitor dielectric film and doped with nitrogen, the first to third lower interface layers being sequentially stacked on the lower electrode, and wherein the upper interface film includes a first upper interface layer including metal oxide, a second upper interface layer including a material that is identical to a material of the first upper interface layer and doped with nitrogen, and a third upper interface layer including a material that is identical to the material of the capacitor dielectric film and doped with nitrogen, the first to third upper interface layers being sequentially stacked on the upper electrode.

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