公开(公告)号：US20240030185A1

公开(公告)日：2024-01-25

申请号：US18112107

申请日：2023-02-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： JU-YOUN CHOI ,  Seunggeol RYU ,  YUN SEOK CHOI

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L23/48 ,  H01L23/538

CPC classification number: H01L25/0652 ,  H01L23/49816 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5389 ,  H01L23/5386

Abstract: A semiconductor package comprising a main semiconductor chip having a first thickness, at least one semiconductor device on one side of the main semiconductor chip and having a second thickness less than the first thickness, a first molding layer that covers the main semiconductor chip and the semiconductor device so as to expose a top surface of the semiconductor device and to expose a top surface and a portion of a lateral surface of the main semiconductor chip, a first redistribution substrate below the first molding layer, a second redistribution substrate on the first molding layer, and a mold via that penetrates the first molding layer and connects the first redistribution substrate to the second redistribution substrate.

公开(公告)号：US20250089371A1

公开(公告)日：2025-03-13

申请号：US18626413

申请日：2024-04-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYOUNGSUK YANG ,  SEONGHO SHIN ,  MI-NA CHOI ,  JU-YOUN CHOI

IPC: H01L27/12 ,  G09G3/00

Abstract: A driving circuit mounting film according to an embodiment includes a base film having a first surface and a second surface facing each other, a driving circuit part positioned on the first surface of the base film, a plurality of signal lines positioned on the first surface of the base film, and a test signal pad part positioned on the second surface of the base film, wherein the test signal pad part includes a plurality of openings, and at least part of the plurality of openings overlaps with at least part of the plurality of first signal lines.

公开(公告)号：US20190385997A1

公开(公告)日：2019-12-19

申请号：US16554818

申请日：2019-08-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JU-YOUN CHOI ,  EUN-SEOK SONG ,  SEUNG-YONG CHA ,  YUN-HEE LEE

IPC: H01L25/18 ,  H01L23/538 ,  H01F27/28 ,  H01F27/24 ,  H01L25/065

Abstract: An electronic device package includes a package substrate, an interposer located above the package substrate and electrically connected to the package substrate, a processing device located above the interposer and electrically connected to the interposer, at least one high bandwidth memory device located above the interposer and electrically connected to the interposer and the processing device, a power management integrated circuit device located above the interposer and electrically connected to the interposer and the processing device, and a passive device located on or inside the interposer and electrically connected to the power management integrated circuit device.

公开(公告)号：US20180190635A1

公开(公告)日：2018-07-05

申请号：US15696973

申请日：2017-09-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JU-YOUN CHOI ,  EUN-SEOK SONG ,  SEUNG-YONG CHA ,  YUN-HEE LEE

IPC: H01L25/18 ,  H01L25/065 ,  H01L23/538 ,  H01L23/498 ,  H01F27/28 ,  H01F27/24

Abstract: An electronic device package includes a package substrate, an interposer located above the package substrate and electrically connected to the package substrate, a processing device located above the interposer and electrically connected to the interposer, at least one high bandwidth memory device located above the interposer and electrically connected to the interposer and the processing device, a power management integrated circuit device located above the interposer and electrically connected to the interposer and the processing device, and a passive device located on or inside the interposer and electrically connected to the power management integrated circuit device.