公开(公告)号：US08956923B2

公开(公告)日：2015-02-17

申请号：US13835749

申请日：2013-03-15

Applicant: Samsung Electronics Co, Ltd.

Inventor： Young-Ja Kim ,  Jun-Young Ko ,  Dae-Young Jeong ,  Dae-Sang Chan

IPC: H01L21/00 ,  B05C13/02 ,  B29C65/00 ,  B05D5/12 ,  H01L21/56

CPC classification number: H01L21/56 ,  H01L21/563 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor device comprises loading a circuit board including a semiconductor chip into underfill equipment, positioning the circuit board on a depositing chuck of the underfill equipment, filling an underfill material in a space between the semiconductor chip and the circuit board placed on the depositing chuck; transferring the circuit board including the underfill material so that it is positioned on a post-treatment chuck of the underfill equipment; heating the underfill material of the circuit board placed on the post-treatment chuck in a vacuum state, and unloading the circuit board, of which the underfill material has been heated in the vacuum state, from the underfill equipment.

Abstract translation: 一种制造半导体器件的方法包括将包括半导体芯片的电路板加载到底部填充设备中，将电路板定位在底部填充设备的沉积卡盘上，在半导体芯片和放置在半导体芯片之间的电路板之间的空间中填充底部填充材料 沉积卡盘; 传送包括底部填充材料的电路板，使其位于底部填充设备的后处理卡盘上; 在真空状态下加热放置在后处理卡盘上的电路板的底部填充材料，并将底部填充材料在真空状态下被加热的电路板从底部填充设备卸载。

公开(公告)号：US20190103376A1

公开(公告)日：2019-04-04

申请号：US15937984

申请日：2018-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Man-Hee Han ,  Dae-Sang Chan ,  Sung-il Cho ,  Jung-Lae Jung

IPC: H01L23/00 ,  B23K1/00 ,  B23K1/005 ,  B23K3/08

CPC classification number: H01L24/75 ,  B23K1/0016 ,  B23K1/0056 ,  B23K3/087 ,  B23K2101/40 ,  H01L24/16 ,  H01L24/81 ,  H01L24/95 ,  H01L2224/16225 ,  H01L2224/7501 ,  H01L2224/751 ,  H01L2224/75261 ,  H01L2224/75263 ,  H01L2224/75302 ,  H01L2224/75312 ,  H01L2224/75314 ,  H01L2224/75754 ,  H01L2224/7598 ,  H01L2224/81001 ,  H01L2224/81011 ,  H01L2224/81022 ,  H01L2224/81024 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/13099

Abstract: A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.

公开(公告)号：US10410990B2

公开(公告)日：2019-09-10

申请号：US15937984

申请日：2018-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Man-Hee Han ,  Dae-Sang Chan ,  Sung-Il Cho ,  Jung-Lae Jung

IPC: H01L23/00 ,  B23K1/00 ,  B23K1/005 ,  B23K3/08 ,  B23K101/40

Abstract: A jig for bonding a semiconductor chip may include a pressurizing portion and at least one opening. The pressuring portion may be configured to pressurize an upper surface of the semiconductor chip bonded to a package substrate via a bump and a flux using a laser. The opening may be surrounded by the pressurizing portion. The laser irradiated to the bump and the flux may be transmitted through the opening. A vapor generated from the flux by the laser may be discharged through the opening. Thus, the contamination of the jig caused by the vapor may be prevented so that a transmissivity of the laser through the jig may be maintained.