公开(公告)号：US20150236046A1

公开(公告)日：2015-08-20

申请号：US14700283

申请日：2015-04-30

Applicant: Samsung Display Co., Ltd.

Inventor： Hyung Jun PARK ,  Kyung-Ho PARK ,  Woo-Jung SHIN ,  Si Hyun AHN ,  Dong-Hyun YOO

IPC: H01L27/12 ,  H01L29/417

CPC classification number: H01L27/124 ,  G02F1/136213 ,  G02F1/13624 ,  G02F2001/134345 ,  G02F2001/136245 ,  H01L29/41733 ,  H01L29/41758

Abstract: A thin film transistor array panel includes a first substrate; a gate line and a data line on the first substrate; a storage electrode line on the first substrate where a constant voltage is applied thereto; a first thin film transistor and a second thin film transistor which are connected to the gate line and the data line; a third thin film transistor which is connected to the gate line, the second thin film transistor and the storage electrode line; a first subpixel electrode which is connected to the first thin film transistor; and a second subpixel electrode which is connected to the second thin film transistor.

Abstract translation: 薄膜晶体管阵列面板包括第一基板; 第一基板上的栅极线和数据线; 在第一基板上施加恒定电压的存储电极线; 连接到栅极线和数据线的第一薄膜晶体管和第二薄膜晶体管; 连接到栅极线的第三薄膜晶体管，第二薄膜晶体管和存储电极线; 连接到第一薄膜晶体管的第一子像素电极; 以及与第二薄膜晶体管连接的第二子像素电极。