公开(公告)号：US20240341141A1

公开(公告)日：2024-10-10

申请号：US18620890

申请日：2024-03-28

Applicant: Samsung Display Co., LTD.

Inventor： Jung Suk BANG ,  Sun Kwun SON ,  Dong Hee SHIN ,  Dong Il YOO ,  Myung Hun LIM

IPC: H10K59/131 ,  H10K59/121

CPC classification number: H10K59/131 ,  H10K59/1213 ,  H10K59/1216

Abstract: A display device includes: a first pixel and a second pixel, including: a first transistor comprising a first active region, a first drain electrode, and a first source electrode respectively on one side and another side of the first active region, and a first gate electrode overlapping the first active region, a first capacitor electrode connected to the first gate electrode and overlapping the first source electrode, and a light emitting element connected to the first transistor, wherein a first end of the first source electrode of the first pixel, and a second end of the first source electrode of the second pixel face each other, a third end of the first capacitor electrode of the first pixel, and a fourth end of the first capacitor electrode of the second pixel face each other, and the first end is between the third end and the fourth end.

公开(公告)号：US20240405028A1

公开(公告)日：2024-12-05

申请号：US18680638

申请日：2024-05-31

Applicant: Samsung Display Co., Ltd.

Inventor： Dong Il YOO ,  Jung Suk BANG ,  Min KANG ,  Myung Hun LIM

IPC: H01L27/12 ,  H01L25/16

Abstract: A display device may include first, second, and third sub-pixels. Each of the first, second, and third sub-pixels may include: a pixel circuit layer including first, second, and third transistors disposed on a substrate, and a bridge pattern disposed on a gate electrode of the first transistor and a source electrode of the second transistor, a first end of the bridge pattern is electrically connected to the source electrode of the second transistor and a second end of the bridge pattern is electrically connected to the gate electrode of the first transistor; first and second alignment electrodes disposed on the pixel circuit layer; and light emitting elements disposed on the first and second alignment electrodes and electrically connected to at least one of the first, second, and third transistors. The second alignment electrode may be supplied with a low potential voltage and overlap the bridge pattern in a plan view.