公开(公告)号：US20180061336A1

公开(公告)日：2018-03-01

申请号：US15635121

申请日：2017-06-27

Applicant: Samsung Display Co., Ltd.

Inventor： Taehyeong An ,  Jeongbong Lee ,  Yujin Kim ,  Gyuhun Han

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/08 ,  G09G2320/0653 ,  G09G2340/0435

Abstract: A display apparatus including a display panel, a gate driving part and a data driving part. The display panel is configured to display an image, and includes a gate line and a data line. The gate driving part is configured to output a gate signal to the gate line. The data driving part is configured to output a data signal to the data line, and to change a transition time when the data signal transits from a low level to a high level, according to at least one of a change of an inversion method for driving the display panel, and a change of a frame frequency of the image.

公开(公告)号：US10650759B2

公开(公告)日：2020-05-12

申请号：US15635121

申请日：2017-06-27

Applicant: Samsung Display Co., Ltd.

Inventor： Taehyeong An ,  Jeongbong Lee ,  Yujin Kim ,  Gyuhun Han

IPC: G09G3/36

Abstract: A display apparatus including a display panel, a gate driving part and a data driving part. The display panel is configured to display an image, and includes a gate line and a data line. The gate driving part is configured to output a gate signal to the gate line. The data driving part is configured to output a data signal to the data line, and to change a transition time when the data signal transits from a low level to a high level, according to at least one of a change of an inversion method for driving the display panel, and a change of a frame frequency of the image.

公开(公告)号：US10366668B2

公开(公告)日：2019-07-30

申请号：US15434245

申请日：2017-02-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Dongwook Lee ,  Jinho Jeong ,  Wooil Park ,  Gyuhun Han ,  Seonghyun Go

IPC: G09G5/00 ,  G09G3/36

Abstract: A data driver which drives a display panel including a data line, a gate line and a common voltage line. The data driver includes a digital-to-analog converter configured to convert a data signal to a data voltage and an output buffer configured to amplify the data voltage. The output buffer includes an output channel through which an amplified data voltage is output to the data line and a dummy channel through which a feedback voltage corresponding to a common voltage from the common voltage line is received.