公开(公告)号：US20230345766A1

公开(公告)日：2023-10-26

申请号：US18102945

申请日：2023-01-30

Applicant: Samsung Display Co., Ltd.

Inventor： DONGHYEOK LEE ,  SEUNGGYU TAE ,  MOOSOON KO ,  JIN SEOCK MA ,  YONGHO YANG ,  KI-BOK YOO ,  JIN-SUK LEE

IPC: H10K59/122

CPC classification number: H10K59/122 ,  H10K59/35

Abstract: A display device includes a base layer including a plurality of pixel regions, which include a first pixel region, a second pixel region, and a non-pixel region, a pixel defining film disposed on the non-pixel region of the base layer and including a pixel opening disposed corresponding to each of the plurality of pixel regions, and a light-emitting element layer. A valley pattern surrounding a portion of each of the plurality of pixel regions is defined in the pixel defining film and includes a first valley pattern and a second valley pattern. An opening portion is defined at which the valley pattern does not surround the pixel regions and includes a first opening portion and a second opening portion. The first opening portion and the second opening portion do not face each other.

公开(公告)号：US20220157925A1

公开(公告)日：2022-05-19

申请号：US17398336

申请日：2021-08-10

Applicant: Samsung Display Co., Ltd.

Inventor： HYUNEOK SHIN ,  HYUNWOO KANG ,  HYUNAH SUNG ,  DOKEUN SONG ,  SUKYOUNG YANG ,  YUNJONG YEO ,  DONGMIN LEE ,  DONGHYEOK LEE ,  SHIN IL CHOI

IPC: H01L27/32

Abstract: A display device includes an active layer in a display area, a first gate insulation layer on the active layer, a first gate line on the first gate insulation layer in the display area, a first signal line in the same layer as the first gate line in a non-display area and including the same material as that of the first gate line including molybdenum, a second gate insulation layer on the first gate line and the first signal line, a second gate line on the second gate insulation layer in the display area, and a second signal line in the same layer as the second gate line in the non-display area and including the same material as that of the second gate line including aluminum or an aluminum alloy. A width of the first signal line is greater than a width of the second signal line.

公开(公告)号：US20240224679A1

公开(公告)日：2024-07-04

申请号：US18441694

申请日：2024-02-14

Applicant: Samsung Display Co., Ltd.

Inventor： HYUNEOK SHIN ,  HYUNWOO KANG ,  HYUNAH SUNG ,  DOKEUN SONG ,  SUKYOUNG YANG ,  YUNJONG YEO ,  DONGMIN LEE ,  DONGHYEOK LEE ,  SHIN IL CHOI

IPC: H10K59/131 ,  H10K59/12

CPC classification number: H10K59/1315 ,  H10K59/1201

Abstract: A display device includes an active layer in a display area, a first gate insulation layer on the active layer, a first gate line on the first gate insulation layer in the display area, a first signal line in the same layer as the first gate line in a non-display area and including the same material as that of the first gate line including molybdenum, a second gate insulation layer on the first gate line and the first signal line, a second gate line on the second gate insulation layer in the display area, and a second signal line in the same layer as the second gate line in the non-display area and including the same material as that of the second gate line including aluminum or an aluminum alloy. A width of the first signal line is greater than a width of the second signal line.

公开(公告)号：US20230005998A1

公开(公告)日：2023-01-05

申请号：US17678286

申请日：2022-02-23

Applicant: Samsung Display Co., Ltd.

Inventor： SANGHOON OH ,  DONGHYEOK LEE ,  JONGSEOK KIM ,  JINGOO JUNG ,  YUNSIK JOO ,  KYUNG HYUN CHOI

IPC: H01L27/32 ,  H01L51/52

Abstract: An electronic device includes a display panel including a first area having a transmissive area and an element area and a second area disposed adjacent to the first area, and an electronic module disposed below the first area, wherein the display panel includes a substrate, a light blocking layer which is disposed on the substrate and has a first opening defining the transmissive area, pixel circuits disposed on the light blocking layer, and light emitting elements respectively connected to the pixel circuits, wherein the pixel circuits include outermost conductive patterns disposed adjacent to the transmissive area, the light blocking layer includes target portions each having a straight-line shaped edge in a plan view, and a minimum distance between an edge of each of the target portions and an edge of a corresponding one of the outermost conductive patterns is about 5 micrometers to about 20 micrometers.