公开(公告)号：US20250048835A1

公开(公告)日：2025-02-06

申请号：US18653744

申请日：2024-05-02

Applicant: Samsung Display Co., Ltd.

Inventor： JIHOON YANG ,  MIN KANG ,  JUNG SUK BANG ,  CHEOL-GON LEE

IPC: H10K59/121 ,  H10K59/131 ,  H10K59/65

Abstract: A display device includes a first control line, a second control line, and a third control line arranged in a first direction, the first control line being between the second control line and the third control line, a pixel circuit coupled to the first control line, the second control line, and the third control line, a light-emitting element coupled to the pixel circuit, a sensor circuit coupled to the first control line, and having a first connection node between the first control line and the third control line, a light-receiving element coupled to the sensor circuit, and a receive line coupled to the first connection node of the sensor circuit.

公开(公告)号：US20250104632A1

公开(公告)日：2025-03-27

申请号：US18890456

申请日：2024-09-19

Applicant: Samsung Display Co., LTD.

Inventor： KEUK-JIN JEONG ,  WONGYUN KIM ,  JIHOON YANG ,  MIN KANG

IPC: G09G3/3233 ,  G09G3/32

Abstract: A pixel circuit includes a light emitting element including an anode electrode and a cathode electrode, a driving transistor including a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node, a data write transistor including a gate electrode, a first electrode, and a second electrode connected to the second node, a compensation transistor including a gate electrode, a first electrode connected to the third node, and a second electrode connected to the first node, an initialization transistor including a gate electrode, a first electrode, and a second electrode connected to the first node, a first light emission control transistor including a gate electrode, a first electrode, and a second electrode connected to the second node, and a storage capacitor including a first electrode and a second electrode connected to the first node.

公开(公告)号：US20250104613A1

公开(公告)日：2025-03-27

申请号：US18887359

申请日：2024-09-17

Applicant: Samsung Display Co., LTD.

Inventor： KEUK-JIN JEONG ,  WONGYUN KIM ,  MIN KANG

IPC: G09G3/32 ,  G09G3/3233

Abstract: A pixel includes a first transistor including a gate electrode connected to a first node and connected between a second node and a third node, a second transistor including a gate electrode receiving a first power voltage, a first electrode receiving a second power voltage, and a second electrode connected to the third node, a third transistor including a gate electrode receiving a gate signal and connected between a data line and the first node, a fourth transistor including a gate electrode receiving a first emission signal and connected between the gate electrode of the second transistor and the second node, a fifth transistor including a gate electrode receiving a second emission signal and a first electrode connected to the third node, and a light emitting element including an anode electrode connected to the second electrode of the fifth transistor and a cathode electrode receiving a third power voltage.

公开(公告)号：US20250104631A1

公开(公告)日：2025-03-27

申请号：US18887434

申请日：2024-09-17

Applicant: Samsung Display Co., LTD.

Inventor： KEUK-JIN JEONG ,  WONGYUN KIM ,  MIN KANG

IPC: G09G3/3233

Abstract: A pixel circuit includes a light-emitting element, a first transistor which applies a first power supply voltage to a second node in response to a voltage of a first node, a second transistor which applies a voltage of the second node to the first node in response to a control signal, a third transistor which applies the voltage of the second node to the light-emitting element in response to the control signal and a first capacitor connected to the first node. The first power supply voltage has a first voltage level, a second voltage level lower than the first voltage level or a data voltage.

公开(公告)号：US20250104630A1

公开(公告)日：2025-03-27

申请号：US18826723

申请日：2024-09-06

Applicant: Samsung Display Co., LTD.

Inventor： KEUK-JIN JEONG ,  WONGYUN KIM ,  MIN KANG

IPC: G09G3/3233 ,  G09G3/32 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel includes a capacitor connected between a first power supply voltage line and a first node, a first transistor including a gate connected to the first node, a first terminal connected to a second node, and a second terminal connected to a third node, a second transistor including a gate receiving a scan signal, a first terminal connected to a data line, and a second terminal connected to the second node, a third transistor including a gate receiving the scan signal, a first terminal connected to the third node, and a second terminal connected to the first node, a fourth transistor including a gate connected to the second node, a first terminal connected to an initialization voltage line, and a second terminal connected to the first node, and a light emitting element connected to the third node and a second power supply voltage line.

公开(公告)号：US20250104612A1

公开(公告)日：2025-03-27

申请号：US18886849

申请日：2024-09-16

Applicant: Samsung Display Co., LTD.

Inventor： KEUK-JIN JEONG ,  WONGYUN KIM ,  MIN KANG

IPC: G09G3/32 ,  G09G3/3233

Abstract: A pixel circuit includes a light emitting element including an anode electrode and a cathode electrode configured to receive a second power voltage, a driving transistor including a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node, a compensation transistor including a gate electrode configured to receive a compensation gate signal, a first electrode configured to receive a ground voltage, and a second electrode connected to the third node, a data write transistor including a gate electrode configured to receive a data write gate signal, a first electrode connected to a data line, and a second electrode connected to the first node, a first light emission control transistor, a first electrode configured to receive a first power voltage, and a second electrode connected to the second node, a storage capacitor, and a hold capacitor.

公开(公告)号：US20250104610A1

公开(公告)日：2025-03-27

申请号：US18827138

申请日：2024-09-06

Applicant: Samsung Display Co., LTD.

Inventor： KEUK-JIN JEONG ,  WONGYUN KIM ,  MIN KANG

IPC: G09G3/32 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel includes a capacitor between a line transferring a first power supply voltage and a first node, a first transistor including a gate connected to the first node, a first terminal connected to a second node, and a second terminal connected to a third node, a second transistor including a gate receiving a scan signal, and a terminal connected to the second node, a third transistor including a gate receiving the scan signal, a first terminal connected to the third node, and a second terminal connected to the first node, a fourth transistor including a gate connected to the second node, and a terminal connected to the first node, a fifth transistor including a gate receiving the scan signal, a first terminal connected to the line, a sixth transistor including a terminal connected to the third node, and a light-emitting element connected to the terminal of the sixth transistor.

公开(公告)号：US20150064857A1

公开(公告)日：2015-03-05

申请号：US14224284

申请日：2014-03-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： MIN KANG ,  Hyunjoo Lee ,  Bong-Yeon Kim ,  DongEon Lee ,  Yong Son ,  Junhyuk Woo ,  Jinho Ju

IPC: G03F1/26 ,  H01L21/033 ,  H01L27/12

CPC classification number: G03F1/26 ,  G03F1/32 ,  H01L27/1288

Abstract: A mask for etching a target layer includes a mask substrate. A phase inversion layer is disposed to correspond to a non-etched area of a pattern target layer. The phase inversion layer is configured to generate inverted light by inverting a phase of incident light and to transmit the inverted light to the non-etched area of a pattern target layer. An inversion offset part is disposed in a center part of the phase inversion layer. The inversion offset part is configured to generate offset light causing destructive interference with the inverted light in the non-etched area and to provide the offset light to the non-etched area.

Abstract translation: 用于蚀刻目标层的掩模包括掩模基板。 相位反转层设置成对应于图案目标层的未蚀刻区域。 相位反转层被配置为通过反射入射光的相位并将反射的光传输到图案目标层的未蚀刻区域来产生反相光。 反转偏移部分设置在相位反转层的中心部分。 反转偏移部分被配置为产生偏移光，其对非蚀刻区域中的反射光产生相消干涉并且向非蚀刻区域提供偏移光。