公开(公告)号：US20140027728A1

公开(公告)日：2014-01-30

申请号：US13757965

申请日：2013-02-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JU-WON YOON ,  IL-JEONG LEE ,  CHOONG-YOUL IM ,  DO-HYUN KWON ,  MOO-SOON KO ,  MIN-WOO WOO

IPC: H01L51/52 ,  H01L51/56 ,  H01L33/08

CPC classification number: H01L51/5203 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0262 ,  H01L33/08 ,  H01L51/56 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An organic light emitting diode display includes a substrate, a scan line formed on the substrate and transferring a scan signal, a data line and a driving voltage line crossing the scan line and transferring a data signal and a driving voltage, respectively, a switching thin film transistor connected to the scan line and the data line, a driving thin film transistor connected to the switching thin film transistor and the driving voltage line, and an organic light emitting diode connected to the driving thin film transistor. The driving thin film transistor includes a driving semiconductor layer, a first gate insulating layer covering the driving semiconductor layer, a floating gate electrode formed on the first gate insulating layer, a second gate insulating layer, and a driving gate electrode formed on the second gate insulating layer.

Abstract translation: 有机发光二极管显示器包括基板，形成在基板上的扫描线，传送扫描信号，数据线和与扫描线交叉的驱动电压线，分别传送数据信号和驱动电压，切换薄 连接到扫描线和数据线的薄膜晶体管，连接到开关薄膜晶体管和驱动电压线的驱动薄膜晶体管和连接到驱动薄膜晶体管的有机发光二极管。 驱动薄膜晶体管包括驱动半导体层，覆盖驱动半导体层的第一栅极绝缘层，形成在第一栅极绝缘层上的浮置栅电极，第二栅极绝缘层和形成在第二栅极上的驱动栅电极 绝缘层。

公开(公告)号：US20250081749A1

公开(公告)日：2025-03-06

申请号：US18794243

申请日：2024-08-05

Applicant: Samsung Display Co., Ltd.

Inventor： JUNGHYUN KWON ,  JU-WON YOON ,  SHIN TACK KANG ,  JAEBEEN LEE

IPC: H10K59/122 ,  H10K59/38

Abstract: A display panel includes a circuit board and an element layer disposed on the circuit board and including a pixel defining layer having a plurality of openings, and a spacer disposed on the pixel defining layer. The plurality of openings include a first opening, a second opening, and a third opening that are adjacent to the spacer. The spacer includes a central portion disposed between the first, second, and third openings and a first extension, a second extension, and a third extension that protrude from the central portion in three directions, respectively. End portions of the first, second, and third extensions are disposed in a region defined by virtual lines connecting a first center of the first opening, a second center of the second opening, and a third center of the third opening.

公开(公告)号：US20240268146A1

公开(公告)日：2024-08-08

申请号：US18406397

申请日：2024-01-08

Applicant: Samsung Display Co., LTD.

Inventor： JUNG-HUN NOH ,  GUANGHAI JIN ,  JU-WON YOON

IPC: H10K59/12 ,  H01L27/12

CPC classification number: H10K59/1201 ,  H01L27/1259

Abstract: A method of manufacturing a display device includes forming an active pattern including a semiconductor area on a substrate, forming a first conductive layer including a floating gate electrode overlapping the semiconductor area on the active pattern, forming a second conductive layer including a control gate electrode overlapping the floating gate electrode on the first conductive layer, forming a global line layer including a first global line electrically connected to the control gate electrode on the second conductive layer, providing a first constant voltage to the first global line, and removing the global line layer.

公开(公告)号：US20210126071A1

公开(公告)日：2021-04-29

申请号：US17140484

申请日：2021-01-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JEONG-SOO LEE ,  MOO SOON KO ,  MIN WOO WOO ,  JU-WON YOON ,  DEUK MYUNG JI

IPC: H01L27/32 ,  H01L29/786 ,  G09G3/3258 ,  H01L27/12 ,  G09G3/3233

Abstract: A display device includes a plurality of pixels. Each pixel includes a first transistor including a first gate electrode, a first source region, and a first drain region, a second transistor connected to the first source region of the first transistor, a third transistor connected to the first gate electrode and the first drain region of the first transistor, a fifth transistor connected to the first source region of the first transistor, and a sixth transistor connected to the first drain region of the first transistor. The pixels include a first pixel and a second pixel disposed adjacent to each other. The first and second pixels share a fourth transistor connected to the third transistor of the first pixel and the third transistor of the second pixel, and share a seventh transistor connected to the sixth transistor of the first pixel and the sixth transistor of the second pixel.