Abstract:
A switching amplifier includes a first half-bridge PWM modulator, a second half-bridge PWM modulator, and at least one amplifier stage configured to receive input signals. The switching amplifier also includes a PWM control stage configured to control switching of the first PWM modulator and of the second PWM modulator as a function of the input signals, by respective first PWM control signals and second PWM control signals. The amplifier stage and the PWM control stage have a fully differential structure.
Abstract:
A half bridge switching power stage includes high/low side switches driven in response to a cycle-by-cycle protected driving signal derived from a PWM signal. Signals indicative of detected over-currents at said high/low side switches are processed to output the cycle-by-cycle protected driving signal, when the signal indicative of the detected over-current indicates, during a time interval within which the high/low side switch is turned on, that current flowing in the turned on high/low side switch crosses a given threshold, as an inverted PWM signal by turning off the turned on high/low side switch, and otherwise outputting said cycle-by-cycle protected driving signal as a not inverted PWM signal. An anomaly detection circuit receives the signals indicative of the over-current and switches off both the high/low side switches when an anomaly is detected in a pattern of over-current events in the signals indicative of the over-current.
Abstract:
A switching circuit includes first and second half bridges supplying an electrical load via filter networks. During alternate switching sequences a first transistor pair (high-side in one half bridge and low-side in the other half bridge) is switched to a non-conductive state, and a second transistor pair (high-side in the other half bridge and low-side in the one half bridge) is switched to a conductive state. A current flow line is provided by an inductance, a first switch and a second switch between outputs of the half bridges. In a medium-high power mode, the first and second switches are in the conductive state between switching the first pair of transistors to the non-conductive state and the second pair of transistors to the conductive state. In a low or quiescent power mode, switching the first and second switches to the conductive state is refrained due to application of a longer delay.