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    SCHMITT TRIGGER IN FDSOI TECHNOLOGY
    2.
    发明申请
    SCHMITT TRIGGER IN FDSOI TECHNOLOGY 有权
    FDSOI技术中的SCHMITT触发器

    公开(公告)号：US20150263707A1

    公开(公告)日：2015-09-17

    申请号：US14216719

    申请日：2014-03-17

    Applicant: STMicroelectronics International N.V.

    Inventor： Ravinder KUMAR

    IPC: H03K3/3565

    CPC classification number: H03K3/3565

    Abstract: A Schmitt Trigger is implemented in FDSOI technology. The Schmitt Trigger includes a first inverting stage having an NMOS and PMOS transistor having their drains tied together. The NMOS and PMOS transistor each have a first gate coupled to the input voltage and a back gate coupled to the output of the Schmitt Trigger.

    Abstract translation: 施密特触发器采用FDSOI技术实现。 施密特触发器包括具有连接在一起的NMOS和PMOS晶体管的第一反相级。 NMOS和PMOS晶体管各自具有耦合到输入电压的第一栅极和耦合到施密特触发器的输出的后栅极。

    LEVEL SHIFTING CIRCUIT WITH CONDITIONAL BODY BIASING OF TRANSISTORS
    3.
    发明申请
    LEVEL SHIFTING CIRCUIT WITH CONDITIONAL BODY BIASING OF TRANSISTORS 审中-公开

    公开(公告)号：US20190326911A1

    公开(公告)日：2019-10-24

    申请号：US16430923

    申请日：2019-06-04

    Applicant: STMicroelectronics International N.V.

    Inventor： Ravinder KUMAR

    IPC: H03K19/0185 ,  H03K19/20

    Abstract: A level shifting circuit receives a first input signal and complement of the first input signal as inputs and generates a level shifted first output signal and complement of the first output signal as outputs. The level shifting circuit includes a number of transistors that support body biasing. One set of body bias signals applied to certain ones of those transistors is generated as a function of the logical combination of the first input signal and the first output signal. Another set of body bias signals applied to certain other ones of those transistors is generated as a function of the logical combination of the complement of the first input signal and the complement of the first output signal. The conditional body bias applied to the transistors of the level shifting circuit makes the circuit operational for level shift at very low supply voltage levels.

    VOLTAGE COMPENSATION OF DIFFERENTIAL VOLTAGE SWING
    4.
    发明公开
    VOLTAGE COMPENSATION OF DIFFERENTIAL VOLTAGE SWING 审中-公开

    公开(公告)号：US20240291488A1

    公开(公告)日：2024-08-29

    申请号：US18582446

    申请日：2024-02-20

    Applicant: STMicroelectronics International N.V.

    Inventor： Ravinder KUMAR ,  Saiyid Mohammad Irshad RIZVI

    IPC: H03K19/003 ,  H03K19/0175

    CPC classification number: H03K19/00369 ,  H03K19/017545 ,  H03K19/017581

    Abstract: The present disclosure is directed to a voltage driver, where a combination of first and second resistance blocks controls a differential voltage swing on the outputs of the voltage driver. Variations of an input voltage are compensated by adding different values of the first resistance block to the second resistance block, while keeping a summation of the first and second resistance blocks at a constant value. Three different circuit diagrams are disclosed to generate these different resistances. In each circuit diagram, one or more control signals change the resistance of the combination of first and second resistance blocks. In some embodiments, the value of the second resistance block is changed by the first resistance block to maintain an impedance matching between a transmitter and a receiver, while changing of the first resistance block compensates for the differential voltage swing.

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