公开(公告)号：US10998018B1

公开(公告)日：2021-05-04

申请号：US16746378

申请日：2020-01-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shubham Ranjan ,  Parvinder Kumar Rana ,  Janardhan Achanta ,  Manish Chandra Joshi

IPC: G11C7/12 ,  G11C7/10

Abstract: Provided are apparatus and methods for compensating fabrication process variation of on-chip component(s) in shared memory bank. The method includes tracking a flip voltage level and tracking a discharge leakage current to disconnect a keeper circuit from the local read bit-line. The method includes controlling a read current and the discharge leakage current based on determining at least one of fast transistor and slow transistor associated with the at least one the keeper circuit and a bit-cell.