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    Semiconductor Device With Vertical Channel Transistor And Method Of Fabricating The Same
    1.
    发明申请
    Semiconductor Device With Vertical Channel Transistor And Method Of Fabricating The Same 有权
    具有垂直沟道晶体管的半导体器件及其制造方法

    公开(公告)号：US20130302959A1

    公开(公告)日：2013-11-14

    申请号：US13790076

    申请日：2013-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seonghwee CHEONG ,  Mansug KANG ,  Joon KIM ,  Kihong NAM ,  Gyuwan CHOI

    IPC: H01L29/66

    CPC classification number: H01L29/66666 ,  H01L27/1052 ,  H01L27/10876 ,  H01L27/228 ,  H01L27/2454

    Abstract: A semiconductor device with vertical channel transistors and a method of fabricating the same are provided. A method of fabricating the semiconductor device includes patterning a substrate to form a trench that defines an active region, forming a sacrificial pattern in a lower region of the trench, forming a spacer on an upper sidewall of the trench, recessing a top surface of the sacrificial pattern to form a window exposing a sidewall of the active region between the spacer and the sacrificial pattern, doping a sidewall of the trench through the window to form a doped region in the active region, and forming a wiring in the trench to be connected to the doped region.

    Abstract translation: 提供了具有垂直沟道晶体管的半导体器件及其制造方法。 一种制造半导体器件的方法包括图案化衬底以形成限定有源区的沟槽，在沟槽的下部区域中形成牺牲图案，在沟槽的上侧壁上形成间隔物，使沟槽的顶面凹陷 牺牲图案以形成暴露间隔物和牺牲图案之间的有源区域的侧壁的窗口，通过窗口掺杂沟槽的侧壁以在有源区域中形成掺杂区域，以及在待连接的沟槽中形成布线 到掺杂区域。

    METHODS FOR FORMING FINE PATTERNS OF A SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHODS FOR FORMING FINE PATTERNS OF A SEMICONDUCTOR DEVICE 有权
    形成半导体器件精细图案的方法

    公开(公告)号：US20130260559A1

    公开(公告)日：2013-10-03

    申请号：US13799125

    申请日：2013-03-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Joon-Soo PARK ,  Kukhan YOON ,  Joon KIM ,  Cheolhong KIM ,  Seokwoo NAM

    IPC: H01L21/308

    CPC classification number: H01L21/3083 ,  H01L21/0331 ,  H01L21/0337 ,  H01L21/31144 ,  H01L27/10817 ,  H01L27/10891 ,  H01L27/11556 ,  H01L27/24 ,  H01L28/91

    Abstract: Methods of forming fine patterns are provided. The methods may include forming first hard mask patterns extending in a first direction on a lower layer, forming second hard mask patterns filling gap regions between the first hard mask patterns, forming first mask patterns extending in a second direction perpendicular to the first direction on the first and second hard mask patterns, etching the first hard mask patterns using the first mask patterns as etch masks to form first openings, forming second mask patterns filling the first openings and extending in the second direction, and etching the second hard mask patterns using the second mask patterns as etch masks to form second openings spaced apart from the first openings in a diagonal direction with respect to the first direction.

    Abstract translation: 提供形成精细图案的方法。 所述方法可以包括形成在下层上沿着第一方向延伸的第一硬掩模图案，形成填充第一硬掩模图案之间的间隙区域的第二硬掩模图案，形成沿垂直于第一方向的第二方向延伸的第一掩模图案 第一和第二硬掩模图案，使用第一掩模图案蚀刻第一硬掩模图案作为蚀刻掩模以形成第一开口，形成填充第一开口并在第二方向上延伸的第二掩模图案，以及使用 第二掩模图案作为蚀刻掩模，以在相对于第一方向的对角线方向上形成与第一开口间隔开的第二开口。

    IMAGE SENSOR INCLUDING COLOR FILTERS SEPARATED BY TWO INSULATING LAYERS
    4.
    发明申请
    IMAGE SENSOR INCLUDING COLOR FILTERS SEPARATED BY TWO INSULATING LAYERS 审中-公开

    公开(公告)号：US20190386065A1

    公开(公告)日：2019-12-19

    申请号：US16555074

    申请日：2019-08-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong Hyun YOO ,  Eun Mi KIM ,  Joon KIM ,  Chang Hwa KIM ,  Sang Su PARK ,  Kyung Rae BYUN ,  Sang Hoon SONG

    IPC: H01L27/30 ,  H01L51/42 ,  H01L31/0216 ,  H01L27/146 ,  H01L31/0224 ,  H01L27/28

    Abstract: The present invention relates to image sensors and method of manufacturing the same. The image sensor may include a substrate having pixel regions in which photoelectric-conversion devices and storage node regions spaced apart from each other; a lower contact via between the photoelectric conversion-devices in the pixel regions; a first insulating layer on the lower contact via and having an opening; an upper contact via electrically connected to the lower contact via through the first insulating layer and protruding from the first insulating layer; a second insulating layer surrounding the first insulating layer and the upper contact via, an upper surface of the second insulating layer in the opening defining a trench; a color filter filling the trench; a protective film exposing the upper contact via; a first transparent electrode on the protective film that contacts the upper contact via; and an organic photoelectric layer on the first transparent electrode.

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