公开(公告)号：US20210110267A1

公开(公告)日：2021-04-15

申请号：US16599306

申请日：2019-10-11

Applicant: QUALCOMM Incorporated

Inventor： Giby SAMSON ,  Srivatsan CHELLAPPA ,  Ramaprasath VILANGUDIPITCHAI ,  Seung Hyuk KANG

IPC: G06N3/08 ,  G06N3/063 ,  G06F7/544

Abstract: Certain aspects of the present disclosure are directed to methods and apparatus for configuring a multiply-accumulate (MAC) block in an artificial neural network. A method generally includes receiving, at a neural processing unit comprising one or more logic elements, at least one input associated with a use-case of the neural processing unit; obtaining a set of weights associated with the at least one input; selecting a precision for the set of weights; modifying the set of weights based on the selected precision; and generating an output based, at least in part, on the at least one input, the modified set of weights, and an activation function.

公开(公告)号：US20210405973A1

公开(公告)日：2021-12-30

申请号：US16913631

申请日：2020-06-26

Applicant: QUALCOMM Incorporated

Inventor： Rui LI ,  De LU ,  Venkat NARAYANAN ,  Srivatsan CHELLAPPA

IPC: G06F7/58

Abstract: A true random number generator (TRNG) for generating a sequence of random numbers of bits is disclosed. The TRNG includes a TRNG cell configured to generate a sequence of bits logically alternating with a mean frequency and with substantially random period jitter; a period monitor configured to generate a first sequence of random bits based on a set of periods of the sequence of logically alternating bits; and a sampling circuit configured to sample the first sequence of random bits in response to a sampling clock to generate a second sequence of random bits.