公开(公告)号：US10685735B1

公开(公告)日：2020-06-16

申请号：US16420198

申请日：2019-05-23

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Shii-Yeu Chern ,  Hsiang-Jui Huang ,  Ping-Yu Hsieh ,  Zih-Jia Wang ,  Yun-You Lin

IPC: G11C29/00 ,  G06F11/18 ,  G06F3/06 ,  G11C16/34

Abstract: The invention provides a memory management method, a memory storage device, and a memory control circuit unit. The method includes: recording an error bit number of each upper physical programming unit and an error bit number of each lower physical programming unit of each of the physical erasing units; determining whether a first physical erasing unit is a bad physical erasing unit according to distributions of the error bit numbers of the upper physical programming units and the lower physical programming units of the first physical erasing unit of the physical erasing units; and performing a data transfer operation on data in the first physical erasing unit if the first physical erasing unit is determined as the bad physical erasing unit.