公开(公告)号：US20190278480A1

公开(公告)日：2019-09-12

申请号：US15956749

申请日：2018-04-19

Applicant: PHISON ELECTRONICS CORP.

Inventor： Siu-Tung Lam ,  Ming-Yen Lee ,  Kuo-Lung Lee

IPC: G06F3/06 ,  G06F12/02 ,  G06F11/10 ,  G11C29/52 ,  G06F15/18

Abstract: A block management method, a memory control circuit unit and a memory storage apparatus for managing a plurality of physical blocks are provided. The method includes reading user data from a first physical block among physical blocks to obtain a plurality of parameters; inputting the parameters corresponding to the first physical block into a machine learning based block recognizer to group the first physical block into a first block group or a second block group according to an output result of the machine learning based block recognizer; establishing a first and second block mapping tables; mapping logical addresses of the first and second block mapping tables to the physical blocks belonging to the first and second block groups. The parameters may comprise at least one of a read busy time parameter, an error bit position parameter and a storage retention parameter. A machine learning operation may be performed using first and second test physical blocks, and corresponding parameters, as training data. A usage status may be determined according to the parameters, and blocks with a usage status of good may be used first to evenly use all the physical blocks.

公开(公告)号：US20170185337A1

公开(公告)日：2017-06-29

申请号：US15063476

申请日：2016-03-07

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ming-Yen Lee

IPC: G06F3/06

Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes recording use information according to each physical erasing unit of a rewritable non-volatile memory module. The method also includes configuring a plurality of super physical units. An address offset value corresponding to a first unavailable physical programming unit of a first physical erasing unit in a first super physical unit is the same as an address offset value corresponding to a first available physical programming unit of a second physical erasing unit in the first super physical unit.

公开(公告)号：US10579289B2

公开(公告)日：2020-03-03

申请号：US15063476

申请日：2016-03-07

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ming-Yen Lee

IPC: G06F3/00 ,  G06F3/06

Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes recording use information according to each physical erasing unit of a rewritable non-volatile memory module. The method also includes configuring a plurality of super physical units. An address offset value corresponding to a first unavailable physical programming unit of a first physical erasing unit in a first super physical unit is the same as an address offset value corresponding to a first available physical programming unit of a second physical erasing unit in the first super physical unit.