公开(公告)号：US10177216B2

公开(公告)日：2019-01-08

申请号：US15585139

申请日：2017-05-02

Applicant: MEDIATEK INC.

Inventor： Chih-Hou Tsai ,  Wei-Hao Tsai ,  Rong-Sing Chu ,  Ying-Zu Lin ,  Chao-Hsin Lu

IPC: H01L49/02 ,  H01G4/30 ,  H01G4/33 ,  H01G4/38 ,  H01G4/012 ,  H01G4/232 ,  H01G4/10

Abstract: A metal-oxide-metal (MOM) capacitor is provided in the present invention. The MOM capacitor includes a capacitor element, wherein the capacitor element includes a first electrode and a second electrode. A projection of the first electrode includes a closed pattern in the vertical projection direction. A projection of the second electrode is surrounded by the closed pattern of the projection of the first electrode in the vertical projection direction.

公开(公告)号：US20170352719A1

公开(公告)日：2017-12-07

申请号：US15585139

申请日：2017-05-02

Applicant: MEDIATEK INC.

Inventor： Chih-Hou Tsai ,  Wei-Hao Tsai ,  Rong-Sing Chu ,  Ying-Zu Lin ,  Chao-Hsin Lu

IPC: H01L49/02

CPC classification number: H01L28/86 ,  H01G4/012 ,  H01G4/10 ,  H01G4/232 ,  H01G4/306 ,  H01G4/33 ,  H01G4/385

Abstract: A metal-oxide-metal (MOM) capacitor is provided in the present invention. The MOM capacitor includes a capacitor element, wherein the capacitor element includes a first electrode and a second electrode. A projection of the first electrode includes a closed pattern in the vertical projection direction. A projection of the second electrode is surrounded by the closed pattern of the projection of the first electrode in the vertical projection direction.

公开(公告)号：US10236903B2

公开(公告)日：2019-03-19

申请号：US15495144

申请日：2017-04-24

Applicant: MEDIATEK INC.

Inventor： Ying-Zu Lin ,  Rong-Sing Chu

IPC: H03M1/12 ,  H03M1/46 ,  H03M1/06 ,  H03M1/80

Abstract: A charge compensation circuit for use in an analog-to-digital converter (ADC) includes at least one capacitor and at least one logic circuit. A first terminal of the capacitor is coupled to a reference voltage of the analog-to-digital converter. The logic circuit is configured to adjust a voltage at a second terminal of the capacitor according to a control signal. The control signal is determined according to at least one output bit from the analog-to-digital converter.