公开(公告)号：US20160308763A1

公开(公告)日：2016-10-20

申请号：US15196676

申请日：2016-06-29

Applicant: Juniper Networks, Inc.

Inventor： Pradeep SINDHU ,  Abhijit CHOUDHURY ,  James MURPHY ,  Raghavendra MALLYA ,  Pranay POGDE ,  Phalguni NANDA ,  Jayabharat BODDU ,  Gunes AYBAY ,  Anjan VENKATRAMANI

IPC: H04L12/723 ,  H04L12/46

CPC classification number: H04L45/50 ,  H04L12/4633 ,  H04W84/12 ,  H04W88/08

Abstract: In some embodiments, an apparatus comprises a core network node and a control module within an enterprise network architecture. The core network node is configured to be operatively coupled to a set of wired network nodes and a set of wireless network nodes. The core network node is configured to receive a first tunneled packet associated with a first session from a wired network node from the set of wired network nodes. The core network node is configured to also receive a second tunneled packet associated with a second session from a wireless network node from the set of wireless network nodes through intervening wired network nodes from the set of wired network nodes. The control module is operatively coupled to the core network node. The control module is configured to manage the first session and the second session.

公开(公告)号：US20180091444A1

公开(公告)日：2018-03-29

申请号：US15827676

申请日：2017-11-30

Applicant: Juniper Networks, Inc.

Inventor： Pradeep SINDHU ,  Gunes AYBAY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Quaizar VOHRA

IPC: H04L12/931 ,  H04L12/933 ,  H04L12/947

CPC classification number: H04L49/35 ,  H04L49/00 ,  H04L49/1515 ,  H04L49/251 ,  H04L49/356 ,  H04L49/70

Abstract: In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric. A first set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have a protocol. Each peripheral processing device from the first set of peripheral processing devices is a storage node that has virtualized resources. The virtualized resources of the first set of peripheral processing devices collectively define a virtual storage resource interconnected by the switch core. A second set of peripheral processing devices coupled to the multi-stage switch fabric by a set of connections that have the protocol. Each peripheral processing device from the first set of peripheral processing devices is a compute node that has virtualized resources. The virtualized resources of the second set of peripheral processing devices collectively define a virtual compute resource interconnected by the switch core.

公开(公告)号：US20130173841A1

公开(公告)日：2013-07-04

申请号：US13776231

申请日：2013-02-25

Applicant: Juniper Networks, Inc.

Inventor： Anjan VENKATRAMANI ,  Srinivas PERLA ,  John KEEN

IPC: G06F12/06

CPC classification number: G06F13/1626 ,  G06F12/0607 ,  G06F12/0615 ,  G06F13/1642 ,  G06F13/1647 ,  G06F13/1652

Abstract: A device may receive a request to read data from or write data to a memory that includes a number of memory banks. The request may include an address. The device may perform a mapping operation on the address to map the address from a first address space to a second address space, identify one of the memory banks based on the address in the second address space, and send the request to the identified memory bank.

Abstract translation: 设备可以接收从包括多个存储体的存储器读取数据或向数据写入数据的请求。 请求可能包含一个地址。 设备可以对地址执行映射操作，以将地址从第一地址空间映射到第二地址空间，基于第二地址空间中的地址识别存储体之一，并将该请求发送到所识别的存储体 。

公开(公告)号：US20130061010A1

公开(公告)日：2013-03-07

申请号：US13665261

申请日：2012-10-31

Applicant: JUNIPER NETWORKS, INC.

Inventor： Anjan VENKATRAMANI ,  Srinivas PERLA ,  John KEEN

IPC: G06F12/00

CPC classification number: G06F13/1626 ,  G06F12/0607 ,  G06F12/0615 ,  G06F13/1642 ,  G06F13/1647 ,  G06F13/1652

Abstract: A device may receive requests intended for a memory that includes a number of banks, determine a number of the requests intended for each of the banks, determine an order for the requests based on the determined number of the requests intended for each of the banks, and send one of the requests to the memory based on the determined order.

Abstract translation: 设备可以接收针对包括多个银行的存储器的请求，确定针对每个银行的请求的数量，基于确定的针对每个银行的请求的确定的数量来确定请求的顺序， 并根据确定的顺序将一个请求发送到存储器。

公开(公告)号：US20150131670A1

公开(公告)日：2015-05-14

申请号：US14603901

申请日：2015-01-23

Applicant: Juniper Networks, Inc.

Inventor： Gunes AYBAY ,  Pradeep SINDHU ,  Anjan VENKATRAMANI

IPC: H04L12/24 ,  H04L12/771

CPC classification number: H04L41/082 ,  G06F13/4022 ,  G06F2213/0058 ,  H04L1/00 ,  H04L12/28 ,  H04L41/12 ,  H04L45/563

Abstract: In some embodiments, an apparatus comprises a processing module, disposed within a first switch fabric element, configured to detect a second switch fabric element having a routing module when the second switch fabric element is operatively coupled to the first switch fabric element. The processing module is configured to define a virtual processing module configured to be operatively coupled to the second switch fabric element. The virtual processing module is configured to receive a request from the second switch fabric element for forwarding information and the virtual processing module is configured to send the forwarding information to the routing module.

Abstract translation: 在一些实施例中，一种装置包括设置在第一交换结构元件内的处理模块，被配置为当第二交换结构元件可操作地耦合到第一交换结构元件时检测具有路由模块的第二交换结构元素。 处理模块被配置为定义被配置为可操作地耦合到第二交换结构元件的虚拟处理模块。 虚拟处理模块被配置为从第二交换结构元素接收用于转发信息的请求，并且虚拟处理模块被配置为将转发信息发送到路由模块。

公开(公告)号：US20130142197A1

公开(公告)日：2013-06-06

申请号：US13684866

申请日：2012-11-26

Applicant: Juniper Networks, Inc.

Inventor： Philippe LACROUTE ,  Matthew A. TUCKER ,  John D. WEISBLOOM ,  Anjan VENKATRAMANI ,  Jayabharat BODDU ,  Stefan DYCKERHOFF

IPC: H04L12/56

CPC classification number: H04L49/10 ,  H04L49/15 ,  H04L49/1507 ,  H04L49/30 ,  H04L49/3027

Abstract: A switching device includes multiple interfaces and a switch fabric. The switch fabric includes switch integrated circuits arranged in a number of stages. Multiple virtual switch planes may be implemented in the switch fabric. Data traffic received at the interfaces is selectively assigned to different ones of the virtual switch planes.

Abstract translation: 交换设备包括多个接口和交换结构。 交换结构包括以多个级布置的开关集成电路。 可以在交换结构中实现多个虚拟交换机平面。 在接口处接收到的数据流量被选择性地分配给虚拟交换机的不同的平面。

公开(公告)号：US20220150185A1

公开(公告)日：2022-05-12

申请号：US17585882

申请日：2022-01-27

Applicant: Juniper Networks, Inc.

Inventor： Pradeep SINDHU ,  Gunes AYBAY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Quaizar VOHRA

IPC: H04L49/00 ,  H04L41/0806 ,  H04L49/25 ,  H04L49/35 ,  H04L49/356 ,  H04L41/084

Abstract: In one embodiment, edge devices can be configured to be coupled to a multi-stage switch fabric and peripheral processing devices. The edge devices and the multi-stage switch fabric can collectively define a single logical entity. A first edge device from the edge devices can be configured to be coupled to a first peripheral processing device from the peripheral processing devices. The second edge device from the edge devices can be configured to be coupled to a second peripheral processing device from the peripheral processing devices. The first edge device can be configured such that virtual resources including a first virtual resource can be defined at the first peripheral processing device. A network management module coupled to the edge devices and configured to provision the virtual resources such that the first virtual resource can be migrated from the first peripheral processing device to the second peripheral processing device.

公开(公告)号：US20200014637A1

公开(公告)日：2020-01-09

申请号：US16574678

申请日：2019-09-18

Applicant: Juniper Networks, Inc.

Inventor： Pradeep SINDHU ,  Gunes AYBAY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Quaizar VOHRA

IPC: H04L12/935 ,  H04L12/24 ,  H04L12/947 ,  H04L12/931

Abstract: In one embodiment, edge devices can be configured to be coupled to a multi-stage switch fabric and peripheral processing devices. The edge devices and the multi-stage switch fabric can collectively define a single logical entity. A first edge device from the edge devices can be configured to be coupled to a first peripheral processing device from the peripheral processing devices. The second edge device from the edge devices can be configured to be coupled to a second peripheral processing device from the peripheral processing devices. The first edge device can be configured such that virtual resources including a first virtual resource can be defined at the first peripheral processing device. A network management module coupled to the edge devices and configured to provision the virtual resources such that the first virtual resource can be migrated from the first peripheral processing device to the second peripheral processing device.

公开(公告)号：US20190044888A1

公开(公告)日：2019-02-07

申请号：US16146806

申请日：2018-09-28

Applicant: Juniper Networks, Inc.

Inventor： Krishna NARAYANASWAMY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Srinivasan JAGANNADHAN

IPC: H04L12/931

Abstract: In some embodiments, a non-transitory processor-readable medium stores code representing instructions to be executed by a processor. The code causes the processor to receive, at an edge device, a first data unit having a characteristic. The code causes the processor to identify, at a first time, an identifier of a service module associated with the characteristic in response to each entry from a set of entries within a flow table not being associated with the characteristic. The code causes the processor to define an entry in the flow table associated with the characteristic and the identifier of the service module. The code causes the processor to send the first data unit to the service module. The code causes the processor to receive, at the edge device, a second data unit having the characteristic, and send the second data unit to the service module based on the entry.

公开(公告)号：US20180278547A1

公开(公告)日：2018-09-27

申请号：US15990102

申请日：2018-05-25

Applicant: Juniper Networks, Inc.

Inventor： Pradeep SINDHU ,  Gunes AYBAY ,  Jean-Marc FRAILONG ,  Anjan VENKATRAMANI ,  Quaizar VOHRA

IPC: H04L12/935 ,  H04L12/931 ,  H04L12/24 ,  H04L12/947 ,  H04L29/06

CPC classification number: H04L49/30 ,  H04L41/0806 ,  H04L41/0846 ,  H04L49/257 ,  H04L49/35 ,  H04L49/356 ,  H04L63/101 ,  Y02D30/30

Abstract: In one embodiment, edge devices can be configured to be coupled to a multi-stage switch fabric and peripheral processing devices. The edge devices and the multi-stage switch fabric can collectively define a single logical entity. A first edge device from the edge devices can be configured to be coupled to a first peripheral processing device from the peripheral processing devices. The second edge device from the edge devices can be configured to be coupled to a second peripheral processing device from the peripheral processing devices. The first edge device can be configured such that virtual resources including a first virtual resource can be defined at the first peripheral processing device. A network management module coupled to the edge devices and configured to provision the virtual resources such that the first virtual resource can be migrated from the first peripheral processing device to the second peripheral processing device.