公开(公告)号：US11823303B2

公开(公告)日：2023-11-21

申请号：US16932768

申请日：2020-07-19

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Luping Cui ,  Jiajin Tu ,  Hu Liu ,  Honghui Yuan ,  Heng Liao ,  Hou Fun Lam ,  Bing Li

IPC: G06F17/16 ,  G06T1/20 ,  G06N3/02 ,  G06V10/82 ,  G06V10/44

CPC classification number: G06T1/20 ,  G06F17/16 ,  G06N3/02 ,  G06V10/454 ,  G06V10/82

Abstract: A data processing method and apparatus are disclosed. In various embodiments, R groups of proposal region sequences are obtained. Each group of proposal region sequence includes a plurality of proposal regions. In those embodiments, a VRPAC instruction is invoked to calculate an area of each proposal region in each group of proposal region sequence. For a jth group of proposal region sequence in the R groups of proposal region sequences, a VIOU instruction and a VAADD instruction are invoked to determine j suppression matrices of the jth group of proposal region sequence and determine a suppression vector of the jth group of proposal region sequence based on the j suppression matrices. In those embodiments, an unsuppressed proposal region is determined based on a suppression vector of each group of proposal region sequence.

公开(公告)号：US20200026746A1

公开(公告)日：2020-01-23

申请号：US16586164

申请日：2019-09-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jiajin Tu ,  Fan Zhu ,  Qiang Lin ,  Hu Liu

IPC: G06F17/16

Abstract: A matrix and vector multiplication operation method includes obtaining first indication information of a matrix element, reading a matrix element value of a non-zero element from a preset matrix based on the first indication information, and determining a first location mark code of the read matrix element value, obtaining second indication information of a vector element, reading, from input vector data based on the second indication information, a vector element value of a second location mark code corresponding to the first location mark code, and obtaining a multiplication operation value of the matrix element value and the vector element value.

公开(公告)号：US11934481B2

公开(公告)日：2024-03-19

申请号：US17725492

申请日：2022-04-20

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Hu Liu ,  Heng Liao ,  Jiajin Tu ,  Honghui Yuan ,  Hou Fun Lam ,  Fan Zhu

IPC: G06F17/16

CPC classification number: G06F17/16

Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.

公开(公告)号：US11334648B2

公开(公告)日：2022-05-17

申请号：US16915915

申请日：2020-06-29

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Hu Liu ,  Heng Liao ,  Jiajin Tu ,  Honghui Yuan ,  Hou Fun Lam ,  Fan Zhu

IPC: G06F17/16

Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.

公开(公告)号：US20220245218A1

公开(公告)日：2022-08-04

申请号：US17725492

申请日：2022-04-20

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Hu Liu ,  Heng Liao ,  Jiajin Tu ,  Honghui Yuan ,  Hou Fun Lam ,  Fan Zhu

IPC: G06F17/16

Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.

公开(公告)号：US20200334322A1

公开(公告)日：2020-10-22

申请号：US16915915

申请日：2020-06-29

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Hu Liu ,  Heng Liao ,  Jiajin Tu ,  Honghui Yuan ,  Haoxun Lin ,  Fan Zhu

IPC: G06F17/16

Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.