公开(公告)号：US20150137877A1

公开(公告)日：2015-05-21

申请号：US14308931

申请日：2014-06-19

Applicant: Electronics and Telecommunications Research Institute

Inventor： Yun Ho CHOI ,  Youn Sub NOH ,  Hong Gu JI ,  Jin Cheol JEONG ,  In Bok YOM

IPC: G05F3/16

CPC classification number: G05F3/16 ,  G05F3/205

Abstract: Provided is a bias circuit. The bias circuit includes: a first resistor connected between a ground terminal and a first node; a first bias transistor having a drain connected to the first node and a source connected to a second node; a second bias transistor having a drain connected to the second node and a source connected to a negative voltage terminal; a third bias transistor having a drain connected to the ground terminal and a source connected to a third node; and a second resistor connected between the third node and the negative voltage terminal, wherein a gate of the first bias transistor is connected to the second node; a gate of the second bias transistor is connected to the negative voltage terminal; a gate of the third bias transistor is connected to the first node; and a gate bias voltage signal is outputted through the third node.

Abstract translation: 提供偏置电路。 偏置电路包括：连接在接地端子和第一节点之间的第一电阻器; 具有连接到第一节点的漏极和连接到第二节点的源极的第一偏置晶体管; 具有连接到第二节点的漏极和连接到负电压端子的源极的第二偏置晶体管; 具有连接到所述接地端子的漏极和连接到第三节点的源极的第三偏置晶体管; 以及连接在所述第三节点和所述负电压端子之间的第二电阻器，其中所述第一偏置晶体管的栅极连接到所述第二节点; 第二偏置晶体管的栅极连接到负电压端子; 第三偏置晶体管的栅极连接到第一节点; 并且通过第三节点输出栅极偏置电压信号。