公开(公告)号：US10425104B2

公开(公告)日：2019-09-24

申请号：US15809392

申请日：2017-11-10

Applicant: Electronics and Telecommunications Research Institute

Inventor： Min Hyuk Kim ,  Youngmin Choi

IPC: H03M13/11 ,  H03M13/00

Abstract: Provided is a method of scheduling a parity check matrix, the method performed by a low-density parity-check (LDPC) decoder, the method including checking at least one non-zero elemental variable node in the parity check matrix, identifying a first index of a row of the parity check matrix in the at least one non-zero elemental variable node, extracting a column in which the at least one non-zero elemental variable node is positionable from the parity check matrix using the first index, and mapping the at least one non-zero elemental variable node to the extracted column based on an arrangement, and identifying a second index of the column of the parity check matrix through the mapped at least one non-zero elemental variable node.