公开(公告)号：US20150006806A1

公开(公告)日：2015-01-01

申请号：US14244047

申请日：2014-04-03

Applicant: Electronics and Telecommunications Research Institute

Inventor： Hyuk-Je Kwon ,  Young-Seok Choi ,  Sung-Nam Kim ,  Gyung-Ock Kim

IPC: G11C7/10

CPC classification number: G11C7/1072 ,  G11C5/04 ,  G11C11/4093

Abstract: Disclosed are a double data rate synchronous dynamic random access memory module and a configuring method thereof. The DDR SDRAM module in accordance with an embodiment of the present invention includes: a plurality of memory chips; and a serial transceiver portion configured to serially receive first serial data including a control signal and data transferred from outside for the plurality of memory chips and to provide the control signal and the data included in the serially received first serial data to the plurality of memory chips.

Abstract translation: 公开了一种双倍数据速率同步动态随机存取存储器模块及其配置方法。 根据本发明的实施例的DDR SDRAM模块包括：多个存储器芯片; 以及串行收发器部分，其被配置为串行地接收包括控制信号的第一串行数据和从多个存储器芯片从外部传送的数据，并且将包括在串行接收的第一串行数据中的控制信号和数据提供给多个存储器芯片 。