公开(公告)号：US20230259581A1

公开(公告)日：2023-08-17

申请号：US18109690

申请日：2023-02-14

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Won JEON ,  Young-Su KWON ,  Ju-Yeob KIM ,  Hyun-Mi KIM ,  Hye-Ji KIM ,  Chun-Gi LYUH ,  Mi-Young LEE ,  Jae-Hoon CHUNG ,  Yong-Cheol CHO ,  Jin-Ho HAN

IPC: G06F17/16 ,  G06F5/01

CPC classification number: G06F17/16 ,  G06F5/012

Abstract: Disclosed herein is a method for outer-product-based matrix multiplication for a floating-point data type includes receiving first floating-point data and second floating-point data and performing matrix multiplication on the first floating-point data and the second floating-point data, and the result value of the matrix multiplication is calculated based on the suboperation result values of floating-point units.

公开(公告)号：US20240211211A1

公开(公告)日：2024-06-27

申请号：US18488124

申请日：2023-10-17

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Won JEON

IPC: G06F7/544 ,  G06F7/487

CPC classification number: G06F7/5443 ,  G06F7/4876

Abstract: A MAC apparatus using a floating point unit is provided. The MAC apparatus includes: a multiplier that performs a multiplication operation on floating point data; an adder that performs an addition operation between the floating point data calculated by the multiplier and floating point data accumulated in an accumulation register; the accumulation register that accumulates the floating point data calculated by the adder; and an input division controller that, when two pieces of floating point data A and B larger than a calculated data type on which the multiplier performs operation processing are input as operands, divides the two pieces of floating point data A and B into a plurality of pieces of floating point data Aa, Ab, Bc, and Bd according to a specified method and inputs the floating point data Aa, Ab, Bc, and Bd to the multiplier.