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公开(公告)号:US20180317009A1
公开(公告)日:2018-11-01
申请号:US15965933
申请日:2018-04-29
Applicant: DSP GROUP LTD.
Inventor: Eran Feld , Fredy Rabin , Gad Molkho
CPC classification number: H04R3/14 , H04R5/04 , H04R25/43 , H04R27/00 , H04R2201/405 , H04R2227/003
Abstract: There may be provided a system that may include a processor and an audio hub; wherein the audio hub may include first communication interfaces, a second communication interface, a processor, and a memory; wherein the first communication interfaces may be configured to exchange audio signals with a group of audio components of different types; wherein an aggregate number of first communication interface bits exceeds a number of second communication interface bits; wherein the audio signals may include input audio signals received from the group and output audio signals transmitted to the group; wherein the processor may be configured to generate an input multiplex of input audio signals; and wherein the second communication interface may be configured to transmit the input multiplex to the processor and to receive an output multiplex from the processor.
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公开(公告)号:US10433060B2
公开(公告)日:2019-10-01
申请号:US15965933
申请日:2018-04-29
Applicant: DSP GROUP LTD.
Inventor: Eran Feld , Fredy Rabin , Gad Molkho
Abstract: There may be provided a system that may include a processor and an audio hub; wherein the audio hub may include first communication interfaces, a second communication interface, a processor, and a memory; wherein the first communication interfaces may be configured to exchange audio signals with a group of audio components of different types; wherein an aggregate number of first communication interface bits exceeds a number of second communication interface bits; wherein the audio signals may include input audio signals received from the group and output audio signals transmitted to the group; wherein the processor may be configured to generate an input multiplex of input audio signals; and wherein the second communication interface may be configured to transmit the input multiplex to the processor and to receive an output multiplex from the processor.
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