公开(公告)号：US11367791B2

公开(公告)日：2022-06-21

申请号：US16473456

申请日：2018-09-05

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhaohui Qiang ,  Jianhua Du ,  Feng Guan ,  Chunhao Li

IPC: H01L29/786 ,  H01L27/12

Abstract: The present disclosure provides a thin film transistor, a fabricating method thereof, an array substrate, and a display device. The thin film transistor includes: a substrate; a channel region; a heavily doped first semiconductor pattern located on both sides of the channel region; a second semiconductor pattern disposed on the heavily doped first semiconductor pattern; a gate insulating layer covering the channel region and the second semiconductor pattern; a gate pattern disposed on the gate insulating layer, an orthographic projection of the gate pattern on the substrate being within an orthographic projection of the channel region on the substrate; and a source pattern and a drain pattern in contact with the heavily doped first semiconductor pattern through the first via and the second via, respectively.

公开(公告)号：US20200381560A1

公开(公告)日：2020-12-03

申请号：US16473456

申请日：2018-09-05

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhaohui Qiang ,  Jianhua Du ,  Feng Guan ,  Chunhao Li

IPC: H01L29/786 ,  H01L27/12

Abstract: The present disclosure provides a thin film transistor, a fabricating method thereof, an array substrate, and a display device. The thin film transistor includes: a substrate; a channel region; a heavily doped first semiconductor pattern located on both sides of the channel region; a second semiconductor pattern disposed on the heavily doped first semiconductor pattern; a gate insulating layer covering the channel region and the second semiconductor pattern; a gate pattern disposed on the gate insulating layer, an orthographic projection of the gate pattern on the substrate being within an orthographic projection of the channel region on the substrate; and a source pattern and a drain pattern in contact with the heavily doped first semiconductor pattern through the first via and the second via, respectively.