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公开(公告)号：US12236824B2
公开(公告)日：2025-02-25
申请号：US18491531
申请日：2023-10-20
Applicant: BOE Technology Group Co., Ltd.
Inventor： Weixing Liu , Wei Qin , Kuanjun Peng , Tieshi Wang , Chunfang Zhang , Hui Zhang , Changfeng Li , Shunhang Zhang , Kai Hou , Hongrun Wang , Liwei Liu , Yunsik Im , Wanpeng Teng , Xiaolong Li , Kai Guo , Zhiqiang Xu
Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.
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公开(公告)号：US12199105B2
公开(公告)日：2025-01-14
申请号：US18021902
申请日：2022-05-24
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhiqiang Xu , Weixing Liu , Chunfang Zhang , Wanpeng Teng , Jintao Peng , Kai Guo , Meirong Lu
IPC: G02F1/1343 , G02F1/133 , G02F1/13357 , G02F1/1362 , G02F1/1368 , H01L27/12
Abstract: The embodiment of the present disclosure provides a display panel, which includes an array substrate, a counter substrate and a spacer. The array substrate includes a base substrate and a plurality of signal lines on the base substrate. The plurality of signal lines include a plurality of first signal lines and a plurality of second signal lines. The plurality of first signal lines and the plurality of second signal lines intersect each other to define a plurality of first regions. The plurality of first regions include a plurality of first pixel regions, at least one second pixel region and at least one redundant region. The first signal line extends along a first direction, the second signal line includes a body portion extending along a second direction, at least one second signal line further includes a bending portion connected to the body portion.
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公开(公告)号：US20230129625A1
公开(公告)日：2023-04-27
申请号：US17609504
申请日：2021-01-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Weixing Liu , Wei Qin , Kuanjun Peng , Tieshi Wang , Chunfang Zhang , Hui ZHANG , Changfeng Li , Shunhang Zhang , Kai Hou , Hongrun Wang , Liwei Liu , Yunsik Im , Wanpeng Teng , Xiaolong Li , Kai Guo , Zhiqiang Xu
Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.
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公开(公告)号：US10657859B2
公开(公告)日：2020-05-19
申请号：US16410148
申请日：2019-05-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Tieshi Wang , Saihua Chen , Xuefei Wang , Wanpeng Teng , Heliang Di , Zhihong Du , Shanshan Zhou
Abstract: A testing method for splicing screens is provided. The method includes: outputting an image signal to a display screen, wherein the display screen includes a plurality of splicing screens, the image signal includes a plurality of testing sub pictures, the testing sub pictures are arranged correspondingly to the splicing screens so as to enable the splicing screens to display the corresponding testing sub pictures, and the testing sub pictures include testing contents; and testing the splicing screens through the testing contents, wherein the testing contents include a graduation signal, by which an accurate test is performed on the splicing screens.
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公开(公告)号：US20250069554A1
公开(公告)日：2025-02-27
申请号：US18687937
申请日：2023-08-22
Inventor： Weixing Liu , Wanpeng Teng , Zhiqiang Xu , Chunfang Zhang , Meirong Lu , Jintao Peng , Xinxing Wang , Huanhuan Wang
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
Abstract: A shift register, a driving circuit, a driving method and a display device are provided. The shift register includes: an input circuit configured to provide a first voltage or a second voltage to a first node and a light-emitting control signal terminal under a control of a first input signal and a second input signal; a processing circuit configured to provide the first voltage or the second voltage to a second node under a control of the first input signal and a potential of the first node; and an output circuit configured to provide the first voltage or the second voltage to a first output scanning signal terminal under control of a first clock signal and the potential of the first node, and provide the first voltage or the second voltage to a second output scanning signal terminal under a control of a potential of the first output scanning signal terminal.
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Patent Agency Ranking
6.发明授权公开(公告)号：US12219807B2
公开(公告)日：2025-02-04
申请号：US17330704
申请日：2021-05-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Wei Qin , Zhiqiang Xu , Weixing Liu , Wanpeng Teng , Chunfang Zhang
IPC: H10K59/121 , H10K59/65
Abstract: The present disclosure relates to a display panel and a terminal device. The display panel includes a display region. At least a part of the display region is a transparent region. The transparent region has a plurality of pixel rows distributed along a column direction, and each of the plurality of pixel rows includes pixels and transparent portions arranged in a row direction. The pixel rows include first pixel rows and second pixel rows, transparent portions each arranged between two adjacent pixels in each of the first pixel rows are first transparent portions, and transparent portions each arranged between two adjacent pixels in each of the second pixel rows are second transparent portions. A width of each of the first transparent portions in the row direction is greater than a width of each of the second transparent portions in the row direction.
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公开(公告)号：US20240268149A1
公开(公告)日：2024-08-08
申请号：US18041070
申请日：2022-03-22
Applicant: BOE Technology Group Co., Ltd.
Inventor： Weixing Liu , Wanpeng Teng , Tieshi Wang , Chunfang Zhang , Kai Guo , Xiaolong Li , Zhiqiang Xu
IPC: H10K59/121 , G09G3/3258 , H10K59/131 , H10K59/38
CPC classification number: H10K59/1213 , G09G3/3258 , H10K59/1216 , H10K59/131 , H10K59/38 , G09G2300/0426 , G09G2300/0852
Abstract: A light emitting substrate is provided. The light emitting substrate includes a plurality of subpixels. A respective subpixel of the plurality of subpixels includes n1 number of main light emitting elements; n1 number of main pixel driving circuits configured to drive light emission in the n1 number of main light emitting elements; n2 number of auxiliary light emitting elements; n2 number of auxiliary pixel driving circuits configured to drive light emission in the n2 number of auxiliary light emitting elements; n1≥1, and n2≥1. A respective main pixel driving circuit of the n1 number of main pixel driving circuits includes a first driving transistor. A respective auxiliary pixel driving circuit of the n2 number of auxiliary pixel driving circuits includes a second driving transistor. Threshold voltage levels of the first driving transistor and the second driving transistor are substantially the same
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公开(公告)号：US20240242688A1
公开(公告)日：2024-07-18
申请号：US18004901
申请日：2022-01-19
Applicant: BOE Technology Group Co., Ltd.
Inventor： Xiaolong Li , Kuanjun Peng , Kai Guo , Wanpeng Teng , Chunfang Zhang , Weixing Liu , Zhiqiang Xu , Tieshi Wang , Feihu Zhou
IPC: G09G3/36
CPC classification number: G09G3/3648 , G09G2320/0209 , G09G2354/00 , G09G2360/16
Abstract: A display method is provided. The display method includes providing a display panel having a plurality of subpixels, a respective subpixel of the plurality of subpixels including a first area, n1 number of second areas, and n2 number of third areas, the first area being between the n1 number of second areas and the n2 number of third areas, n1≥1, and n2≥1; for displaying a first frame of image, controlling light emission of the respective subpixel to be limited in the first area, m1 number of the n1 number of second areas, and m2 number of the n2 number of third areas; and for displaying a second frame of image, controlling light emission of the respective subpixel to be limited in the first area, ml′ number of the n1 number of second areas, and m2′ number of the n2 number of third areas.
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公开(公告)号：US11837133B2
公开(公告)日：2023-12-05
申请号：US17609504
申请日：2021-01-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Weixing Liu , Wei Qin , Kuanjun Peng , Tieshi Wang , Chunfang Zhang , Hui Zhang , Changfeng Li , Shunhang Zhang , Kai Hou , Hongrun Wang , Liwei Liu , Yunsik Im , Wanpeng Teng , Xiaolong Li , Kai Guo , Zhiqiang Xu
CPC classification number: G09G3/20 , G11C19/287 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G09G2310/08
Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.
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公开(公告)号：US11170701B2
公开(公告)日：2021-11-09
申请号：US16970818
申请日：2019-10-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Wei Qin , Weixing Liu , Tieshi Wang , Kai Guo , Xiaolong Li , Kuanjun Peng , Zhiqiang Xu , Wanpeng Teng
Abstract: An embodiment of the present disclosure provides a driving circuit, a driving method thereof, a display panel and a display device. The driving circuit includes a first transistor electrically connected between a signal input terminal and a light emitting device to be driven, a duration control circuit configured to provide a signal of a duration data signal terminal to a gate of the first transistor in response to a signal of a duration scanning signal terminal, and a latch circuit electrically connected with the gate of the first transistor and configured to latch the signal of the gate of the first transistor.
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