公开(公告)号：US20190067340A1

公开(公告)日：2019-02-28

申请号：US15768634

申请日：2017-10-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shi Shu ,  Chuanxiang Xu ,  Teng Luo ,  Feng Gu ,  Bin Zhang

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  G02F1/1368 ,  G02F1/1362

Abstract: A method for fabricating a thin film transistor includes providing a substrate (100); forming a semiconductor layer (105) over the substrate (100); forming a source-drain metal layer (106) over the semiconductor layer (105); applying one patterning process to the semiconductor layer (105) and the source-drain metal layer (106) to form an active layer (1), a source electrode (2), and a drain electrode (3); forming a gate insulating layer (101) and an interlayer insulating layer (102) that cover the active layer (1), the source electrode (2), and the drain electrode (3); applying a patterning process to the interlayer insulating layer (102) to form a first window (10) in the interlayer insulating layer (102) to expose a portion of the gate insulating layer (101); and forming a gate electrode (4) in the first window (10). An orthogonal projection of the gate electrode (4) on the substrate (100) is in an orthogonal projection of the active layer (1) on the substrate (100).

公开(公告)号：US10546885B2

公开(公告)日：2020-01-28

申请号：US15768634

申请日：2017-10-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shi Shu ,  Chuanxiang Xu ,  Teng Luo ,  Feng Gu ,  Bin Zhang

IPC: H01L27/12 ,  G02F1/1362 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  G02F1/1368 ,  H01L27/32 ,  G02F1/1343 ,  H01L21/02 ,  H01L21/30

Abstract: A method for fabricating a thin film transistor includes providing a substrate (100); forming a semiconductor layer (105) over the substrate (100); forming a source-drain metal layer (106) over the semiconductor layer (105); applying one patterning process to the semiconductor layer (105) and the source-drain metal layer (106) to form an active layer (1), a source electrode (2), and a drain electrode (3); forming a gate insulating layer (101) and an interlayer insulating layer (102) that cover the active layer (1), the source electrode (2), and the drain electrode (3); applying a patterning process to the interlayer insulating layer (102) to form a first window (10) in the interlayer insulating layer (102) to expose a portion of the gate insulating layer (101); and forming a gate electrode (4) in the first window (10). An orthogonal projection of the gate electrode (4) on the substrate (100) is in an orthogonal projection of the active layer (1) on the substrate (100).

公开(公告)号：US10698248B2

公开(公告)日：2020-06-30

申请号：US15810591

申请日：2017-11-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shi Shu ,  Chuanxiang Xu ,  Teng Luo ,  Feng Gu

IPC: G02F1/1335 ,  G02F1/1339 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1343 ,  G02F1/1333

Abstract: The present disclosure provides a counter substrate, a display panel, a display device, and fabricating method, further simplifying the fabricating process of the display panel by reducing the number of masking times required during the making of a spacer pattern and a frame light shielding pattern while achieving the frame light shielding function of the counter substrate and getting the counter substrate conductive with an array substrate. The fabricating method of the counter substrate comprises: forming a transparent electrode layer on a first base substrate; forming a black spacer pattern and a frame light shielding pattern at the same time on the transparent electrode layer, wherein the frame light shielding pattern comprises a first via hole that exposes a portion of the transparent electrode layer; and forming a conductive light shielding layer pattern in the first via hole.

公开(公告)号：US10504944B2

公开(公告)日：2019-12-10

申请号：US15768634

申请日：2017-10-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shi Shu ,  Chuanxiang Xu ,  Teng Luo ,  Feng Gu ,  Bin Zhang

IPC: H01L27/12 ,  G02F1/1362 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  G02F1/1368 ,  H01L27/32 ,  G02F1/1343 ,  H01L21/02 ,  H01L21/30

Abstract: A method for fabricating a thin film transistor includes providing a substrate (100); forming a semiconductor layer (105) over the substrate (100); forming a source-drain metal layer (106) over the semiconductor layer (105); applying one patterning process to the semiconductor layer (105) and the source-drain metal layer (106) to form an active layer (1), a source electrode (2), and a drain electrode (3); forming a gate insulating layer (101) and an interlayer insulating layer (102) that cover the active layer (1), the source electrode (2), and the drain electrode (3); applying a patterning process to the interlayer insulating layer (102) to form a first window (10) in the interlayer insulating layer (102) to expose a portion of the gate insulating layer (101); and forming a gate electrode (4) in the first window (10). An orthogonal projection of the gate electrode (4) on the substrate (100) is in an orthogonal projection of the active layer (1) on the substrate (100).