公开(公告)号：US3876991A

公开(公告)日：1975-04-08

申请号：US37805273

申请日：1973-07-11

Applicant: BELL TELEPHONE LABOR INC

Inventor： NELSON JAMES THOMAS ,  ROSENZWEIG WALTER

IPC: G11C11/405 ,  G11C11/40 ,  G11C11/24

CPC classification number: G11C11/405

Abstract: Single select line, three transistor dynamic memory cells require precise control of the trilevel select line voltage to insure that only the intended state is selected. Typically, one transistor is associated with a write state; a second transistor, with a read state; and a third transistor, with the storage function. A dual threshold dynamic memory cell, wherein the threshold voltage of the write transistor is substantially different than the threshold voltage of the read transistor, significantly relaxes the precise select voltage control requirement. The different threshold voltages can be provided at the time of manufacture by using conventional techniques, such as selective ion implantation or selective gate oxidation.