公开(公告)号：US11475841B2

公开(公告)日：2022-10-18

申请号：US17000258

申请日：2020-08-21

Applicant: Apple Inc.

Inventor： Shingo Hatanaka ,  Derek Keith Shaeffer ,  Kenichi Ueno ,  Masaki Kinoshita ,  Nobutaka Shimamura

IPC: G09G3/3258

Abstract: A system may include buffer circuitry that receives an input signal representative of image data for display via a pixel. The buffer circuitry may provide a first driving signal during a first frame of the image data to the pixel based on the input signal. The buffer circuitry may include slew booster circuitry. The slew booster circuitry may supply a voltage boost (e.g., additional voltage) to differential pair stage circuitry of the buffer circuit in response to a difference between the input signal and a second driving signal exceeding a threshold increase a rate of change of the input signal provided. The second driving signal may be provided to the pixel during a second frame of the image data preceding the first frame.

公开(公告)号：US11176888B2

公开(公告)日：2021-11-16

申请号：US16905895

申请日：2020-06-18

Applicant: Apple Inc.

Inventor： Shingo Hatanaka ,  Derek Keith Shaeffer ,  John T. Wetherell ,  Nobutaka Shimamura ,  Yuichi Okuda ,  Jaeyoung Kang

IPC: G09G3/3258 ,  H03F3/30

Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.

公开(公告)号：US20210056907A1

公开(公告)日：2021-02-25

申请号：US17000258

申请日：2020-08-21

Applicant: Apple Inc.

Inventor： Shingo Hatanaka ,  Derek Keith Shaeffer ,  Kenichi Ueno ,  Masaki Kinoshita ,  Nobutaka Shimamura

IPC: G09G3/3258

Abstract: A system may include buffer circuitry that receives an input signal representative of image data for display via a pixel. The buffer circuitry may provide a first driving signal during a first frame of the image data to the pixel based on the input signal. The buffer circuitry may include slew booster circuitry. The slew booster circuitry may supply a voltage boost (e.g., additional voltage) to differential pair stage circuitry of the buffer circuit in response to a difference between the input signal and a second driving signal exceeding a threshold increase a rate of change of the input signal provided. The second driving signal may be provided to the pixel during a second frame of the image data preceding the first frame.

公开(公告)号：US20210056904A1

公开(公告)日：2021-02-25

申请号：US16905895

申请日：2020-06-18

Applicant: Apple Inc.

Inventor： Shingo Hatanaka ,  Derek Keith Shaeffer ,  John T. Wetherell ,  Nobutaka Shimamura ,  Yuichi Okuda ,  Jaeyoung Kang

IPC: G09G3/3258 ,  H03F3/30

Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.