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公开(公告)号：US20250088707A1
公开(公告)日：2025-03-13
申请号：US18407151
申请日：2024-01-08
Applicant: Apple Inc.
Inventor： Ka-Shu Ko , Abheek Banerjee
IPC: H04N21/4402 , G06F1/03 , H04N21/44
Abstract: To improve video parser performance and reduce bottleneck, a video parser may parse a video stream to decode multiple symbols per clock cycle. By decoding multiple symbols per clock cycle, the video parser may decode symbols more quickly and efficiently compared to decoding one symbol per clock cycle, and thus may be less likely to act as a bottleneck for remaining video decoding operations.
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