-
公开(公告)号：US11507641B2
公开(公告)日：2022-11-22
申请号：US16428903
申请日：2019-05-31
Applicant: Advanced Micro Devices, Inc.
Inventor： Majed Valad Beigi , Amin Farmahini-Farahani , Sudhanva Gurumurthi
Abstract: Techniques for performing in-memory matrix multiplication, taking into account temperature variations in the memory, are disclosed. In one example, the matrix multiplication memory uses ohmic multiplication and current summing to perform the dot products involved in matrix multiplication. One downside to this analog form of multiplication is that temperature affects the accuracy of the results. Thus techniques are provided herein to compensate for the effects of temperature increases on the accuracy of in-memory matrix multiplications. According to the techniques, portions of input matrices are classified as effective or ineffective. Effective portions are mapped to low temperature regions of the in-memory matrix multiplier and ineffective portions are mapped to high temperature regions of the in-memory matrix multiplier. The matrix multiplication is then performed.
-
Patent Agency Ranking
公开(公告)号：US20200380063A1
公开(公告)日：2020-12-03
申请号：US16428903
申请日：2019-05-31
Applicant: Advanced Micro Devices, Inc.
Inventor： Majed Valad Beigi , Amin Farmahini-Farahani , Sudhanva Gurumurthi
Abstract: Techniques for performing in-memory matrix multiplication, taking into account temperature variations in the memory, are disclosed. In one example, the matrix multiplication memory uses ohmic multiplication and current summing to perform the dot products involved in matrix multiplication. One downside to this analog form of multiplication is that temperature affects the accuracy of the results. Thus techniques are provided herein to compensate for the effects of temperature increases on the accuracy of in-memory matrix multiplications. According to the techniques, portions of input matrices are classified as effective or ineffective. Effective portions are mapped to low temperature regions of the in-memory matrix multiplier and ineffective portions are mapped to high temperature regions of the in-memory matrix multiplier. The matrix multiplication is then performed.
-
公开(公告)号：US20240143440A1
公开(公告)日：2024-05-02
申请号：US17977001
申请日：2022-10-31
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： Sudhanva Gurumurthi , Vilas Sridharan , Majed Valad Beigi
IPC: G06F11/10 , G06F11/07 , G06F12/1027
CPC classification number: G06F11/1068 , G06F11/0793 , G06F12/1027
Abstract: A processing system employs techniques for enhancing dynamic random access memory (DRAM) page retirement to facilitate identification and retirement of pages affected by multi-page DRAM faults. In response to detecting an uncorrectable error at a first page of DRAM, the processing system identifies a second page of the DRAM for potential retirement based on one or more of physical proximity to the first page, inclusion in a range of addresses stored at a fault map that tracks addresses of DRAM pages having detected faults, and predicting a set of pages to check for faults based on misses at a translation lookaside buffer (TLB).
-
公开(公告)号：US12216539B2
公开(公告)日：2025-02-04
申请号：US17977001
申请日：2022-10-31
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： Sudhanva Gurumurthi , Vilas Sridharan , Majed Valad Beigi
IPC: G06F11/30 , G06F11/07 , G06F11/10 , G06F12/1027
Abstract: A processing system employs techniques for enhancing dynamic random access memory (DRAM) page retirement to facilitate identification and retirement of pages affected by multi-page DRAM faults. In response to detecting an uncorrectable error at a first page of DRAM, the processing system identifies a second page of the DRAM for potential retirement based on one or more of physical proximity to the first page, inclusion in a range of addresses stored at a fault map that tracks addresses of DRAM pages having detected faults, and predicting a set of pages to check for faults based on misses at a translation lookaside buffer (TLB).
-
公开(公告)号：US11704277B2
公开(公告)日：2023-07-18
申请号：US16716390
申请日：2019-12-16
Applicant: Advanced Micro Devices, Inc.
Inventor： Majed Valad Beigi , Yasuko Eckert , Dongping Zhang
Abstract: Systems and methods for efficiently routing qubits in a quantum computing system include selecting bubble nodes and routing qubits to the bubble nodes. The systems and methods further include dividing a system of nodes into regions and selecting a bubble node for each region. The systems and methods further include using super bubble nodes with reliable links connected to other super bubble nodes and bubble nodes to improve cross-region operations.
-
公开(公告)号：US20210182234A1
公开(公告)日：2021-06-17
申请号：US16716390
申请日：2019-12-16
Applicant: Advanced Micro Devices, Inc.
Inventor： Majed Valad Beigi , Yasuko Eckert , Dongping Zhang
Abstract: Systems and methods for efficiently routing qubits in a quantum computing system include selecting bubble nodes and routing qubits to the bubble nodes. The systems and methods further include dividing a system of nodes into regions and selecting a bubble node for each region. The systems and methods further include using super bubble nodes with reliable links connected to other super bubble nodes and bubble nodes to improve cross-region operations.
-
-
-
-
-
Search Results
6
records
(took 0.028 seconds)
