- 专利标题: Methods of operating memory under erase conditions
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申请号: US15638718申请日: 2017-06-30
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公开(公告)号: US09953711B2公开(公告)日: 2018-04-24
- 发明人: Toru Tanzawa
- 申请人: MICRON TECHNOLOGY, INC.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Dicke, Billig & Czaja, PLLC
- 主分类号: G11C16/06
- IPC分类号: G11C16/06 ; G11C16/14 ; G11C16/04
摘要:
Methods of operating a memory include applying a first voltage level to a first semiconductor material of a first conductivity type forming a channel region for a memory cell of a string of series-connected memory cells, wherein the first semiconductor material is electrically connected to a second semiconductor material of the first conductivity type through a first conductive material of a second conductivity type different than the first conductivity type, and wherein the second semiconductor material forms a channel region for a different memory cell of the string of series-connected memory cells; and applying a second voltage level, less than the first voltage level, to a control gate of the memory cell and applying a third voltage level, less than the second voltage level, to a control gate of the different memory cell while applying the first voltage level to the first semiconductor material.
公开/授权文献
- US20170345506A1 METHODS OF OPERATING MEMORY UNDER ERASE CONDITIONS 公开/授权日:2017-11-30
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