- 专利标题: FPGA matrix architecture
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申请号: US15263111申请日: 2016-09-12
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公开(公告)号: US09904931B2公开(公告)日: 2018-02-27
- 发明人: Marc Battyani
- 申请人: NovaSparks, Inc.
- 申请人地址: US NY New York
- 专利权人: NovaSparks, Inc.
- 当前专利权人: NovaSparks, Inc.
- 当前专利权人地址: US NY New York
- 代理机构: Wolf, Greenfield & Sacks, P.C.
- 主分类号: G06Q40/00
- IPC分类号: G06Q40/00 ; G06F15/173 ; G06F15/16 ; G06Q30/02 ; G06Q40/04 ; H04L29/08 ; G06Q10/10
摘要:
High volume data processing systems and methods are provided to enable ultra-low latency processing and distribution of data. The systems and methods can be implemented to service primary trading houses where microsecond delays can significantly impact performance and value. According to one aspect, the systems and methods are configured to process data from a variety of market data sources in a variety of formats, while maintaining target latencies of less than 1 microsecond. A matrix of FPGA nodes is configured to provide ultra-low latencies while enabling deterministic and distributed processing. In some embodiments, the matrix can be configured to provide consistent latencies even during microburst conditions. Further book building operations (determination of current holdings and assets) can occur under ultra-low latency timing, providing for near instantaneous risk management, management, and execution processes, even under micro-burst conditions. In further embodiments, a FPGA matrix provides a readily expandable and convertible processing platform.
公开/授权文献
- US20160379227A1 FPGA MATRIX ARCHITECTURE 公开/授权日:2016-12-29
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