- 专利标题： Digitally phase locked low dropout regulator apparatus and system using ring oscillators
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申请号： US13976223申请日： 2012-09-25
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公开(公告)号： US09870012B2公开(公告)日： 2018-01-16
- 发明人: Arijit Raychowdhury , Dinesh Somasekhar , James W. Tschanz , Vivek K. De
- 申请人： Intel Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Green, Howard & Mughal LLP
- 国际申请： PCT/US2012/057066 WO 20120925
- 国际公布： WO2014/051545 WO 20140403
- 主分类号： G06F1/00
- IPC分类号： G06F1/00 ; G05F1/577 ; G05F1/56 ; G05F1/46 ; G06F1/06 ; G06F1/26 ; H03L7/085
摘要：
Described is an apparatus which comprises: a first oscillator to generate a first clock signal a second oscillator to generate a second clock signal; a phase frequency detector to detect phase difference between the first and second clock signals, and to generate a phase difference; and an output stage, coupled to a load, to generate a power supply for the load according to the phase difference.
公开/授权文献
- US20150241890A1 DIGITALLY PHASE LOCKED LOW DROPOUT REGULATOR 公开/授权日：2015-08-27
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