A lattice structure is formed in a non-silicon interposer substrate to create large cells that are multiples of through hole pitches to act as islands for dielectric fields. Each unit cell is then filled with a dielectric material. Thereafter, holes (i.e., through holes or blind holes) are created within the dielectric material in the cells. After hole formation, a conductive metal is formed into each of the holes providing an interposer. This method can enable fine pitch processing in organic-based materials, isolates the thermal coefficient of expansion (TCE) stress from metal vias to low TCE carriers and creates a path to high volume, low costs components in panel form.