- 专利标题: Memory cell retention enhancement through erase state modification
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申请号: US14554383申请日: 2014-11-26
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公开(公告)号: US09672909B2公开(公告)日: 2017-06-06
- 发明人: Jim Walls , Santosh Murali
- 申请人: Microchip Technology Incorporated
- 申请人地址: US AZ Chandler
- 专利权人: MICROCHIP TECHNOLOGY INCORPORATED
- 当前专利权人: MICROCHIP TECHNOLOGY INCORPORATED
- 当前专利权人地址: US AZ Chandler
- 代理机构: Slayden Grubert Beard PLLC
- 主分类号: G11C13/00
- IPC分类号: G11C13/00 ; G11C7/04
摘要:
A method of controlling a resistive memory cell is provided. A resistance threshold value is defined for the memory cell, wherein a circuit identifies the cell as erased if a detected resistance of the cell is above the resistance threshold and identifies the cell as programmed if the detected resistance is below the resistance threshold value. A filament is formed across an electrolyte switching region of the cell by applying an electrical charge, wherein the cell having the formed filament has a first resistance. The cell is then erased to an erased state having a second resistance greater than the first resistance. The cell is then programmed to a quasi-erased state having a third resistance between the first and second resistances, and above the resistance threshold value such that the cell is identified by the circuit as erased. The cell may then be maintained in the quasi-erased state.
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