A pattern analysis method of a semiconductor device includes extracting a contour image of material layer patterns formed on a wafer, calculating an individual density value (DV) representing an area difference between the contour image and a target layout image, scoring the material layer patterns on the wafer using the individual DV, identifying a failure pattern among the scored material layer patterns, calculating coordinates of the identified failure pattern and displaying the coordinates on a critical dimension-scanning electron microscopy (CD-SEM) image, inputting a reference DV in the computer and automatically sorting the material layer patterns into material layer patterns having a hotspot and material layer patterns not having a hotspot, and reviewing the sorted material layer patterns having the hotspot.