- 专利标题: Method for making semiconductor device with stacked analog components in back end of line (BEOL) regions
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申请号: US15082987申请日: 2016-03-28
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公开(公告)号: US09660015B2公开(公告)日: 2017-05-23
- 发明人: John H. Zhang
- 申请人: STMicroelectronics, Inc.
- 申请人地址: US TX Coppell
- 专利权人: STMicroelectronics, Inc.
- 当前专利权人: STMicroelectronics, Inc.
- 当前专利权人地址: US TX Coppell
- 代理机构: Seed IP Law Group LLP
- 主分类号: H01L49/02
- IPC分类号: H01L49/02 ; H01L21/768 ; H01L23/522 ; H01L27/06 ; H01L27/08 ; H01L23/528 ; H01L23/532
摘要:
A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.
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