- 专利标题： Semiconductor device with buried gates and bit line contacting peripheral gate
-
申请号： US15014586申请日： 2016-02-03
-
公开(公告)号： US09640626B2公开(公告)日： 2017-05-02
- 发明人: Jong-Han Shin
- 申请人： SK hynix Inc.
- 申请人地址： KR Gyeonggi-do
- 专利权人： Sk Hynix Inc.
- 当前专利权人： Sk Hynix Inc.
- 当前专利权人地址： KR Gyeonggi-do
- 代理机构： IP & T Group LLP
- 优先权： KR10-2010-0128055 20101215
- 主分类号： H01L29/423
- IPC分类号： H01L29/423 ; H01L27/108 ; H01L27/105
摘要：
A semiconductor device includes a substrate having a cell region and a peripheral region, a buried gate formed over the substrate of the cell region, a peripheral gate formed over the substrate of the peripheral region and comprising a conductive layer, an inter-layer dielectric layer that covers the substrate, and a peripheral bit line formed inside the inter-layer dielectric layer and contacting the conductive layer.
公开/授权文献
信息查询
IPC分类:
