Invention Grant
US09490344B2 Methods of making transistor devices with elevated source/drain regions to accommodate consumption during metal silicide formation process
有权
制造具有升高的源极/漏极区域的晶体管器件以适应金属硅化物形成过程中的消耗的方法
- Patent Title: Methods of making transistor devices with elevated source/drain regions to accommodate consumption during metal silicide formation process
- Patent Title (中): 制造具有升高的源极/漏极区域的晶体管器件以适应金属硅化物形成过程中的消耗的方法
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Application No.: US13345922Application Date: 2012-01-09
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Publication No.: US09490344B2Publication Date: 2016-11-08
- Inventor: Stefan Flachowsky , Jan Hoentschel , Thilo Scheiper
- Applicant: Stefan Flachowsky , Jan Hoentschel , Thilo Scheiper
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/334 ; H01L21/336 ; H01L29/66 ; H01L29/78
Abstract:
Disclosed herein are various semiconductor devices with dual metal silicide regions and to various methods of making such devices. One illustrative method disclosed herein includes the steps of forming an upper portion of a source/drain region that is positioned above a surface of a semiconducting substrate, wherein the upper portion of the source/drain region has an upper surface that is positioned above the surface of the substrate by a distance that is at least equal to a target thickness of a metal silicide region to be formed in the upper portion of the source/drain region and forming the metal silicide region in the upper portion of the source/drain region.
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Information query
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