发明授权
- 专利标题: Fin patterning methods for increased process margin
- 专利标题(中): 翅片图案化方法增加工艺余量
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申请号: US14632979申请日: 2015-02-26
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公开(公告)号: US09449880B1公开(公告)日: 2016-09-20
- 发明人: Chin-Yuan Tseng , Chi-Cheng Hung , Chun-Kuang Chen , Chih-Ming Lai , Huan-Just Lin , Ru-Gun Liu , Tsai-Sheng Gau , Wei-Liang Lin
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsin-Chu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L21/311
- IPC分类号: H01L21/311 ; H01L21/8234 ; H01L29/66 ; H01L21/308
摘要:
A method for fabricating a semiconductor device includes forming a plurality of first spacers over a substrate. A second spacer of a plurality of second spacers is deposited on sidewalls of each first spacer. In some embodiments, a spacing between adjacent first spacers is configured such that second spacers formed on sidewalls of the adjacent first spacers physically merge to form a merged second spacer. A second spacer cut process may be performed to selectively remove at least one second spacer. In some embodiments, a third spacer of a plurality of third spacers is formed on sidewalls of each second spacer. A third spacer cut process may be performed to selectively remove at least one third spacer. A first etch process is performed on the substrate to form fin regions. The plurality of third spacers mask portions of the substrate during the first etch process.
公开/授权文献
- US20160254191A1 FIN PATTERNING METHODS FOR INCREASED PROCESS MARGIN 公开/授权日:2016-09-01
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