A semiconductor memory device is provided which includes a sense amplifier, a bit line connected to a plurality of memory cells of a first memory block, a complementary bit line connected to a plurality of memory cells of a second memory block, a first switch configured to connect the bit line to the sense amplifier, and a second switch configured to connect the complementary bit line to the sense amplifier. The first switch is configured to electrically separate the bit line from the sense amplifier when the second memory block performs a refresh operation.