Invention Grant
- Patent Title: Manufacturing method for an array substrate that can avoid electrical leakage of thin film transistors
- Patent Title (中): 能够避免薄膜晶体管漏电的阵列基板的制造方法
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Application No.: US14422818Application Date: 2014-04-30
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Publication No.: US09443875B2Publication Date: 2016-09-13
- Inventor: Yanzhao Li , Gang Wang , Haijing Chen , Wulin Shen , Jingang Fang
- Applicant: BOE TECHNOLOGY GROUP CO., LTD.
- Applicant Address: CN Beijing
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Beijing
- Agency: Nath, Goldberg & Meyer
- Agent Joshua B. Goldberg; Christopher Thomas
- Priority: CN201310745581 20131230
- International Application: PCT/CN2014/076621 WO 20140430
- International Announcement: WO2015/100897 WO 20150709
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L27/12 ; H01L29/417 ; H01L27/32

Abstract:
The present invention provides array substrate and manufacturing method thereof and display device. The manufacturing method comprises: forming patterns including active regions of first and second TFTs by patterning process on substrate; forming gate insulation layer on the substrate; forming patterns including gates of the TFTs by patterning process on the substrate; forming isolation layer on the substrate; forming, on the substrate, second contacting vias for connecting sources and drains of the TFTs to respective active regions and first contacting via for connecting gate of the second TFT to source of the first TFT; and on the substrate, forming patterns of corresponding sources and drains on the second contacting vias above active regions of the TFTs, and meanwhile forming connection line for connecting gate of the second TFT to source of the first TFT above the first contacting via above gate of the second TFT.
Public/Granted literature
- US20160035755A1 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE Public/Granted day:2016-02-04
Information query
IPC分类: