Invention Grant
- Patent Title: Method and apparatus of a fully-pipelined FFT
- Patent Title (中): 全流水线FFT的方法和装置
-
Application No.: US14192725Application Date: 2014-02-27
-
Publication No.: US09418047B2Publication Date: 2016-08-16
- Inventor: Bo Lu , Ricky Lap Kei Cheung , Bo Xia
- Applicant: Tensorcom, Inc.
- Applicant Address: US CA Carlsbad
- Assignee: Tensorcom, Inc.
- Current Assignee: Tensorcom, Inc.
- Current Assignee Address: US CA Carlsbad
- Agent Steven J Shattil
- Main IPC: G06F17/14
- IPC: G06F17/14

Abstract:
A plurality of three bit units (called triplets) are permuted by a shuffler to shuffle the positions of the triplets into different patterns which are used to specific the read/write operation of a memory. For example, the least significant triplet in a conventional counter can be placed in the most significant position of a permuted three triplet pattern. The count of this permuted counter triplet generates addresses that jump 64 positions each clock cycle. These permutations can then be used to generate read and write control information to read from/write to memory banks conducive for efficient Radix-8 Butterfly operation. In addition, one or more triplets can also determine if a barrel shifter or right circular shift is required to shift data from one data lane to a second data lane. The triplets allow efficient FFT operation in a pipelined structure.
Public/Granted literature
- US20150242365A1 Method and Apparatus of a Fully-Pipelined FFT Public/Granted day:2015-08-27
Information query