发明授权
- 专利标题： Via corner engineering in trench-first dual damascene process
- 专利标题（中）： 通过沟槽第一个双镶嵌工艺的拐角工程
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申请号： US14213329申请日： 2014-03-14
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公开(公告)号： US09406589B2公开(公告)日： 2016-08-02
- 发明人: Chih-Yuan Ting
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater Matsil, LLP
- 主分类号： H01L21/4763
- IPC分类号： H01L21/4763 ; H01L23/48 ; H01L21/768
摘要：
An integrated circuit structure includes a first dielectric layer, an etch stop layer over the first dielectric layer, and a second dielectric layer over the etch stop layer. A via is disposed in the first dielectric layer and the etch stop layer. A metal line is disposed in the second dielectric layer, wherein the metal line is connected to the via. The etch stop layer includes a first portion having an edge contacting an edge of the via, wherein the first portion has a first chemical composition, and a second portion in contact with the first portion. The second portion is spaced apart from the via by the first portion, and wherein the second portion has a second chemical composition different from the first composition.
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