SOC and other chip designs increasingly feature IP cores, and many copies of the same core may be present in a single chip. Using wrapped cores, it is possible to determine which cores are defective on a chip during test. Multiple instances of identical cores may be tested in parallel to easily determine which cores are failing. The cores compare a signature generated during test of the core against an expected signature, having a pass/fail bit as a result. The pass/fail bits may be multiplexed at an output pin where output pins are at a premium relative to the number of core instances or the pass/fail bit stored in a register to be later serially-unloaded from the chip. The disclosed embodiments provide for masking circuitry, as well as both identical and different core instances to be run serially and in parallel.