A serial data link receiver and method are provided. In one implementation, the receiver includes a first equalizer for receiving a first received signal and outputting a first equalized signal, and a second equalizer for receiving a second received signal and outputting a second equalized signal. The receiver further includes an analog CDR (clock-data recovery) circuit for receiving the first equalized signal and outputting a first recovered bit stream and a first recovered clock generated in accordance with an analog control voltage, and a digital CDR circuit for receiving the second equalized signal and the first recovered clock and outputting a second recovered bit stream and a second recovered clock based on selecting a phase of the first recovered clock in accordance with a digital phase selection signal.